diff options
author | Michael Hayes <m.hayes@elec.canterbury.ac.nz> | 1999-04-16 16:36:07 +0000 |
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committer | Michael Hayes <m.hayes@gcc.gnu.org> | 1999-04-16 16:36:07 +0000 |
commit | d8b173bb572ca2c1939da19133756524f5fe3243 (patch) | |
tree | 2bd3d1e5c2bf54d8f0376e511f2b33ac55a62621 /gcc | |
parent | 280f9385eef072ea1445a6444d292465654ea018 (diff) | |
download | gcc-d8b173bb572ca2c1939da19133756524f5fe3243.tar.gz |
c4x.md (mulqf3_clrqf_clobber, [...]): New patterns to support parallel multiply and load of zero.
* config/c4x/c4x.md (mulqf3_clrqf_clobber, mulqi3_clrqi_clobber):
New patterns to support parallel multiply and load of zero.
From-SVN: r26492
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/c4x/c4x.md | 32 |
2 files changed, 36 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0802010e79b..e9a584c11dc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Sat Apr 17 11:25:44 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz> + + * config/c4x/c4x.md (mulqf3_clrqf_clobber, mulqi3_clrqi_clobber): + New patterns to support parallel multiply and load of zero. + Fri Apr 16 01:23:47 1999 Jason Merrill <jason@yorick.cygnus.com> * tree.c (valid_machine_attribute): If we're modifying the diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md index 97f67a5c4d6..55c85d977db 100644 --- a/gcc/config/c4x/c4x.md +++ b/gcc/config/c4x/c4x.md @@ -4042,6 +4042,21 @@ [(set_attr "type" "binarycc")]) ; +; MPYF/LDF 0 +; + +(define_insn "*mulqf3_clrqf_clobber" + [(set (match_operand:QF 0 "r0r1_reg_operand" "=t") + (mult:QF (match_operand:QF 1 "par_ind_operand" "S<>") + (match_operand:QF 2 "par_ind_operand" "S<>"))) + (set (match_operand:QF 3 "r2r3_reg_operand" "=u") + (match_operand:QF 4 "fp_zero_operand" "G")) + (clobber (reg:CC 21))] + "TARGET_PARALLEL_MPY" + "mpyf3\\t%2,%1,%0\\n||\\tsubf3\\t%3,%3,%3" + [(set_attr "type" "binarycc")]) + +; ; NEGF/STF ; @@ -4073,7 +4088,6 @@ ; ; PARALLEL INTEGER INSTRUCTIONS ; -; These patterns are under development ; ; ABSI/STI @@ -4195,6 +4209,7 @@ "mpyi3\\t%2,%1,%0\\n||\\taddi3\\t%5,%4,%3" [(set_attr "type" "binarycc")]) + ; ; MPYI/STI ; @@ -4229,6 +4244,21 @@ [(set_attr "type" "binarycc")]) ; +; MPYI/LDI 0 +; + +(define_insn "*mulqi3_clrqi_clobber" + [(set (match_operand:QI 0 "r0r1_reg_operand" "=t") + (mult:QI (match_operand:QI 1 "par_ind_operand" "S<>") + (match_operand:QI 2 "par_ind_operand" "S<>"))) + (set (match_operand:QI 3 "r2r3_reg_operand" "=u") + (const_int 0)) + (clobber (reg:CC 21))] + "TARGET_PARALLEL_MPY && TARGET_MPYI" + "mpyi3\\t%2,%1,%0\\n||\\tsubi3\\t%3,%3,%3" + [(set_attr "type" "binarycc")]) + +; ; NEGI/STI ; |