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authoruweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4>2009-02-09 14:35:38 +0000
committeruweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4>2009-02-09 14:35:38 +0000
commit1f9159112f9357490023cb19260a633aae5384fb (patch)
treeb87c916e274180bfb4883dfd121f227573d2abea /gcc
parentbbe1fc8fc4cc8514ddc35a113d93c882ea33142f (diff)
downloadgcc-1f9159112f9357490023cb19260a633aae5384fb.tar.gz
* config/spu/spu.c (array_to_constant): Fix (latent) wrong-code
generation due to implicit sign extension. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@144034 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/spu/spu.c5
2 files changed, 7 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b1e2ae8b875..267badaa7c7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2009-02-09 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+
+ * config/spu/spu.c (array_to_constant): Fix (latent) wrong-code
+ generation due to implicit sign extension.
+
2009-02-09 Eric Botcazou <ebotcazou@adacore.com>
PR middle-end/38981
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index cd7f6edacb2..75f785393f9 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -4722,9 +4722,8 @@ array_to_constant (enum machine_mode mode, unsigned char arr[16])
}
if (mode == DFmode)
{
- val = (arr[0] << 24) | (arr[1] << 16) | (arr[2] << 8) | arr[3];
- val <<= 32;
- val |= (arr[4] << 24) | (arr[5] << 16) | (arr[6] << 8) | arr[7];
+ for (i = 0, val = 0; i < 8; i++)
+ val = (val << 8) | arr[i];
return hwint_to_const_double (DFmode, val);
}