diff options
author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-04-12 17:44:57 +0000 |
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committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-04-12 17:44:57 +0000 |
commit | d1b79aba888acdc18d77fd0b9e09327c2f73d9c9 (patch) | |
tree | 8f076f29b3fd3960536c224c9eb8b9812aadae07 /gcc | |
parent | de604551abadf196ffef8a8ad54324462be06ee7 (diff) | |
download | gcc-d1b79aba888acdc18d77fd0b9e09327c2f73d9c9.tar.gz |
gcc/
* config/mips/mips.md (load_call<mode>): Allow any general register.
destination.
(sibcall_value_internal, sibcall_value_multiple_internal)
(call_value_internal, call_value_split, call_value_multiple_internal)
(call_value_multiple_split): Remove constraints from operand 0.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@123756 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 20 |
2 files changed, 18 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e98422669bf..aff318411cb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,13 @@ 2007-04-12 Richard Sandiford <richard@codesourcery.com> + * config/mips/mips.md (load_call<mode>): Allow any general register. + destination. + (sibcall_value_internal, sibcall_value_multiple_internal) + (call_value_internal, call_value_split, call_value_multiple_internal) + (call_value_multiple_split): Remove constraints from operand 0. + +2007-04-12 Richard Sandiford <richard@codesourcery.com> + * config/mips/mips-protos.h: In comments, refer to loadgp_absolute rather than loadgp_noshared. * config/mips/mips.c (mips_emit_loadgp): Use gen_loadgp_absolute diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 28fb5022eb7..8fb78ca90ff 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -5139,7 +5139,7 @@ ;; we tell the target-independent code that the address could be changed ;; by any call insn. (define_insn "load_call<mode>" - [(set (match_operand:P 0 "register_operand" "=c") + [(set (match_operand:P 0 "register_operand" "=d") (unspec:P [(match_operand:P 1 "register_operand" "r") (match_operand:P 2 "immediate_operand" "") (reg:P FAKE_CALL_REGNO)] @@ -5194,7 +5194,7 @@ }) (define_insn "sibcall_value_internal" - [(set (match_operand 0 "register_operand" "=df,df") + [(set (match_operand 0 "register_operand" "") (call (mem:SI (match_operand 1 "call_insn_operand" "j,S")) (match_operand 2 "" "")))] "TARGET_SIBCALLS && SIBLING_CALL_P (insn)" @@ -5202,10 +5202,10 @@ [(set_attr "type" "call")]) (define_insn "sibcall_value_multiple_internal" - [(set (match_operand 0 "register_operand" "=df,df") + [(set (match_operand 0 "register_operand" "") (call (mem:SI (match_operand 1 "call_insn_operand" "j,S")) (match_operand 2 "" ""))) - (set (match_operand 3 "register_operand" "=df,df") + (set (match_operand 3 "register_operand" "") (call (mem:SI (match_dup 1)) (match_dup 2)))] "TARGET_SIBCALLS && SIBLING_CALL_P (insn)" @@ -5300,7 +5300,7 @@ ;; See comment for call_internal. (define_insn_and_split "call_value_internal" - [(set (match_operand 0 "register_operand" "=df,df") + [(set (match_operand 0 "register_operand" "") (call (mem:SI (match_operand 1 "call_insn_operand" "c,S")) (match_operand 2 "" ""))) (clobber (reg:SI 31))] @@ -5319,7 +5319,7 @@ (set_attr "extended_mips16" "no,yes")]) (define_insn "call_value_split" - [(set (match_operand 0 "register_operand" "=df") + [(set (match_operand 0 "register_operand" "") (call (mem:SI (match_operand 1 "call_insn_operand" "cS")) (match_operand 2 "" ""))) (clobber (reg:SI 31)) @@ -5330,10 +5330,10 @@ ;; See comment for call_internal. (define_insn_and_split "call_value_multiple_internal" - [(set (match_operand 0 "register_operand" "=df,df") + [(set (match_operand 0 "register_operand" "") (call (mem:SI (match_operand 1 "call_insn_operand" "c,S")) (match_operand 2 "" ""))) - (set (match_operand 3 "register_operand" "=df,df") + (set (match_operand 3 "register_operand" "") (call (mem:SI (match_dup 1)) (match_dup 2))) (clobber (reg:SI 31))] @@ -5352,10 +5352,10 @@ (set_attr "extended_mips16" "no,yes")]) (define_insn "call_value_multiple_split" - [(set (match_operand 0 "register_operand" "=df") + [(set (match_operand 0 "register_operand" "") (call (mem:SI (match_operand 1 "call_insn_operand" "cS")) (match_operand 2 "" ""))) - (set (match_operand 3 "register_operand" "=df") + (set (match_operand 3 "register_operand" "") (call (mem:SI (match_dup 1)) (match_dup 2))) (clobber (reg:SI 31)) |