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authorwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>1999-03-08 17:50:37 +0000
committerwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>1999-03-08 17:50:37 +0000
commitdb8e9ed4b7297a4bc1639cadce0565ce25f98587 (patch)
tree1a1b10b8f474423521688b3622cb9fc89a44b410 /gcc
parent02f1afa569313a1bffb2ee2d197d0df4dce0c4a4 (diff)
downloadgcc-db8e9ed4b7297a4bc1639cadce0565ce25f98587.tar.gz
Fix performance problem on SH with unnecessary move instructions.
* local-alloc.c (combine_regs): Don't combine if we have a hard reg for which CLASS_LIKELY_SPILLED_P is true. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@25644 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog3
-rw-r--r--gcc/local-alloc.c5
2 files changed, 8 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fc6d1efa11c..4f83b46e2dd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,8 @@
Mon Mar 8 16:04:44 1999 Jim Wilson <wilson@cygnus.com>
+ * local-alloc.c (combine_regs): Don't combine if we have a hard reg
+ for which CLASS_LIKELY_SPILLED_P is true.
+
* unroll.c (loop_iterations): Only call loop_find_equiv_value if we
have a REG or SUBREG.
diff --git a/gcc/local-alloc.c b/gcc/local-alloc.c
index ea97f33f5b5..d3dde6b7555 100644
--- a/gcc/local-alloc.c
+++ b/gcc/local-alloc.c
@@ -1648,6 +1648,11 @@ combine_regs (usedreg, setreg, may_save_copy, insn_number, insn, already_dead)
|| ureg == sreg
/* Don't try to connect two different hardware registers. */
|| (ureg < FIRST_PSEUDO_REGISTER && sreg < FIRST_PSEUDO_REGISTER)
+ /* Don't use a hard reg that might be spilled. */
+ || (ureg < FIRST_PSEUDO_REGISTER
+ && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (ureg)))
+ || (sreg < FIRST_PSEUDO_REGISTER
+ && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (sreg)))
/* Don't connect two different machine modes if they have different
implications as to which registers may be used. */
|| !MODES_TIEABLE_P (GET_MODE (usedreg), GET_MODE (setreg)))