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| author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-01-19 13:34:59 +0000 |
|---|---|---|
| committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-01-19 13:34:59 +0000 |
| commit | afc78fc626220619b70051030a1096945ad93e73 (patch) | |
| tree | 2d282a29fb31bb7a9465bb7f14d848ea31f9af9c /gcc | |
| parent | 9b84b1a02fcbc02d79ae96d975f49e0a47f62ff7 (diff) | |
| download | gcc-afc78fc626220619b70051030a1096945ad93e73.tar.gz | |
gcc/
200x-xx-xx Sandra Loosemore <sandra@codesourcery.com>
* longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add
ColdFire alternatives.
* config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro.
* config/m68k/m68k.md (clzsi2): Define for ColdFire
architectures that support ff1 instruction.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@120959 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.h | 3 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.md | 9 | ||||
| -rw-r--r-- | gcc/longlong.h | 5 |
4 files changed, 25 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 014c268ee8d..ee405910c19 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2007-01-19 Sandra Loosemore <sandra@codesourcery.com> + + * longlong.h (count_leading_zeros, COUNT_LEADING_ZEROS_0): Add + ColdFire alternatives. + * config/m68k/m68k.h (CLZ_DEFINED_VALUE_AT_ZERO): New macro. + * config/m68k/m68k.md (clzsi2): Define for ColdFire + architectures that support ff1 instruction. + 2007-01-19 Richard Sandiford <richard@codesourcery.com> Julian Brown <julian@codesourcery.com> diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index d373be7c468..e85c1d9b5fa 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1006,6 +1006,9 @@ __transfer_from_trampoline () \ #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 +/* The ColdFire FF1 instruction returns 32 for zero. */ +#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1) + #define STORE_FLAG_VALUE (-1) #define Pmode SImode diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index c953ec2d434..b3e72e78a40 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -3961,6 +3961,15 @@ return "f<FP:prec>abs%.<FP:prec> %1,%0"; }) +;; bit indexing instructions + +;; ColdFire ff1 instruction implements clz. +(define_insn "clzsi2" + [(set (match_operand:SI 0 "register_operand" "=d") + (clz:SI (match_operand:SI 1 "register_operand" "0")))] + "TARGET_ISAAPLUS || TARGET_ISAC" + "ff1 %0") + ;; one complement instructions ;; "one_cmpldi2" is mainly here to help combine(). diff --git a/gcc/longlong.h b/gcc/longlong.h index 1325b31f0c9..8b512d2f284 100644 --- a/gcc/longlong.h +++ b/gcc/longlong.h @@ -521,6 +521,11 @@ UDItype __umulsidi3 (USItype, USItype); __asm__ ("bfffo %1{%b2:%b2},%0" \ : "=d" ((USItype) (count)) \ : "od" ((USItype) (x)), "n" (0)) +/* Some ColdFire architectures have a ff1 instruction supported via + __builtin_clz. */ +#elif defined (__mcfisaaplus__) || defined (__mcfisac__) +#define count_leading_zeros(count,x) ((count) = __builtin_clz (x)) +#define COUNT_LEADING_ZEROS_0 32 #endif #endif /* mc68000 */ |