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authorRichard Earnshaw <rearnsha@arm.com>2004-02-25 12:30:13 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2004-02-25 12:30:13 +0000
commite1471c91b8215ed17e1f4dde075eee0e9f0f804b (patch)
tree20fce11dc3590fb311ad91a8b941dd7e39851796 /gcc
parent94b18ec10c36955fb3028adeb33bb01af3624afb (diff)
downloadgcc-e1471c91b8215ed17e1f4dde075eee0e9f0f804b.tar.gz
arm.c (arm_legitimate_index_p): For QImode the range of an offset is -4095...+4095 inclusive.
* arm.c (arm_legitimate_index_p): For QImode the range of an offset is -4095...+4095 inclusive. From-SVN: r78429
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/arm/arm.c6
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 78f858b455b..ec2d741ac59 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-02-25 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm.c (arm_legitimate_index_p): For QImode the range of an offset
+ is -4095...+4095 inclusive.
+
2004-02-25 Eric Botcazou <ebotcazou@libertysurf.fr>
* doc/install.texi (sparc-sun-solaris2* specific notes): Document
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a2ab3d65f82..98c05cb6228 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2979,8 +2979,10 @@ arm_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p)
load, but that has a restricted addressing range and we are unable
to tell here whether that is the case. To be safe we restrict all
loads to that range. */
- range = ((mode) == HImode || (mode) == QImode)
- ? (arm_arch4 ? 256 : 4095) : 4096;
+ if (arm_arch4)
+ range = (mode == HImode || mode == QImode) ? 256 : 4096;
+ else
+ range = (mode == HImode) ? 4095 : 4096;
return (code == CONST_INT
&& INTVAL (index) < range