* config/h8300/h8300.h: Fix comment typos.

	* config/h8300/h8300.md: Likewise.
	* config/h8300/lib1funcs.asm: Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@48754 138bc75d-0d04-0410-961f-82ee72b054a4

4 files changed, 16 insertions, 9 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fbabcae9f66..88b566823df 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2002-01-10  Kazu Hirata  <kazu@hxi.com>
+
+	* config/h8300/h8300.h: Fix comment typos.
+	* config/h8300/h8300.md: Likewise.
+	* config/h8300/lib1funcs.asm: Likewise.
+
 2002-01-10  Dale Johannesen  <dalej@apple.com>
 
 	PR optimization/5269
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index b96c9b6e622..3c782d482be 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -243,7 +243,7 @@ extern int target_flags;
 #define PCC_BITFIELD_TYPE_MATTERS  0
 
 /* No data type wants to be aligned rounder than this.
-   32 bit values are aligned as such on the 300h for speed.  */
+   32 bit values are aligned as such on the H8/300H and H8/S for speed.  */
 #define BIGGEST_ALIGNMENT \
 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
 
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 8bb8a91065d..b3aeb60c87b 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -44,11 +44,12 @@
 ;; "worst case" and then be adjusted to their correct values by
 ;; h8300_adjust_insn_length.
 
-;; On the h8300h, adds/subs operate on the 32bit "er" registers.  Right
-;; now GCC doesn't expose the "e" half to the compiler, so using add/subs
-;; for addhi and subhi is safe.
-;; Long term, we want to expose the "e" half to the compiler (gives us
-;; 8 more 16bit registers).  At that point addhi and subhi can't use adds/subs.
+;; On the H8/300H and H8/S, adds/subs operate on the 32bit "er"
+;; registers.  Right now GCC doesn't expose the "e" half to the
+;; compiler, so using add/subs for addhi and subhi is safe.  Long
+;; term, we want to expose the "e" half to the compiler (gives us 8
+;; more 16bit registers).  At that point addhi and subhi can't use
+;; adds/subs.
 
 ;; There's currently no way to have a insv/extzv expander for the H8/300H
 ;; because word_mode is different for the H8/300 and H8/300H.
@@ -1600,7 +1601,7 @@
 
 ;; Call subroutine with no return value.
 
-;; ??? Even though we use HImode here, this works for the 300h.
+;; ??? Even though we use HImode here, this works on the H8/300H and H8/S.
 
 (define_insn "call"
   [(call (match_operand:QI 0 "call_insn_operand" "or")
@@ -1623,7 +1624,7 @@
 ;; Call subroutine, returning value in operand 0
 ;; (which must be a hard register).
 
-;; ??? Even though we use HImode here, this works on the 300h.
+;; ??? Even though we use HImode here, this works on the H8/300H and H8/S.
 
 (define_insn "call_value"
   [(set (match_operand 0 "" "=r")
diff --git a/gcc/config/h8300/lib1funcs.asm b/gcc/config/h8300/lib1funcs.asm
index da69acd435b..a5a9f9559d5 100644
--- a/gcc/config/h8300/lib1funcs.asm
+++ b/gcc/config/h8300/lib1funcs.asm
@@ -767,7 +767,7 @@ _done:
 #ifdef L_fixunssfsi_asm
 /* For the h8300 we use asm to save some bytes, to
    allow more programs to fit into the tiny address
-   space.  For h8300h / h8s, the C version is good enough.  */
+   space.  For the H8/300H and H8S, the C version is good enough.  */
 #ifdef __H8300__
 /* We still treat NANs different than libgcc2.c, but then, the
    behaviour is undefined anyways.  */