Index: ChangeLog

2005-05-31  Geoffrey Keating  <geoffk@geoffk.org>

	* config/rs6000/rs6000.md (sync_boolcshort_internal): New.
	* config/rs6000/rs6000.c (rs6000_emit_sync): Shift count must
	be complemented for big-endian.  Mask for AND must be rotated,
	not shifted.  Handle short operands with NOT on the memory
	operation.

Index: testsuite/ChangeLog
2005-05-31  Geoffrey Keating  <geoffk@geoffk.org>

	* lib/target-supports.exp
	(check_effective_target_sync_char_short): New.
	* gcc.dg/sync-2.c: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@100418 138bc75d-0d04-0410-961f-82ee72b054a4

2 files changed, 108 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7e75d3088f0..5b5fce64d40 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2005-05-31  Geoffrey Keating  <geoffk@geoffk.org>
+
+	* lib/target-supports.exp 
+	(check_effective_target_sync_char_short): New.
+	* gcc.dg/sync-2.c: New.
+
 2005-05-31  Zdenek Dvorak  <dvorakz@suse.cz>
 
 	PR tree-optimization/21817
@@ -83,6 +89,9 @@
 
 2005-05-29  Geoffrey Keating  <geoffk@apple.com>
 
+	PR c++/17413
+	* g++.dg/template/local5.C: New.
+
 	PR target/21761
 	* gcc.c-torture/compile/pr21761.c: New.
 
diff --git a/gcc/testsuite/gcc.dg/sync-2.c b/gcc/testsuite/gcc.dg/sync-2.c
new file mode 100644
index 00000000000..41f8ac1c0a5
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/sync-2.c
@@ -0,0 +1,99 @@
+/* { dg-do run } */
+/* { dg-require-effective-target sync_char_short } */
+
+/* Test functionality of the intrinsics for 'short' and 'char'.  */
+
+extern void abort (void);
+extern void *memcpy (void *, const void *, __SIZE_TYPE__);
+
+static char AI[18];
+static char init_qi[18] = { 3,5,7,9,0,0,0,0,-1,0,0,0,0,0,-1,0,0,0 };
+static char test_qi[18] = { 3,5,7,9,1,4,22,-12,7,8,9,7,1,-12,7,8,9,7 };
+
+static void
+do_qi (void)
+{
+  if (__sync_fetch_and_add(AI+4, 1) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AI+5, 4) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AI+6, 22) != 0)
+    abort ();
+  if (__sync_fetch_and_sub(AI+7, 12) != 0)
+    abort ();
+  if (__sync_fetch_and_and(AI+8, 7) != -1)
+    abort ();
+  if (__sync_fetch_and_or(AI+9, 8) != 0)
+    abort ();
+  if (__sync_fetch_and_xor(AI+10, 9) != 0)
+    abort ();
+  if (__sync_fetch_and_nand(AI+11, 7) != 0)
+    abort ();
+
+  if (__sync_add_and_fetch(AI+12, 1) != 1)
+    abort ();
+  if (__sync_sub_and_fetch(AI+13, 12) != -12)
+    abort ();
+  if (__sync_and_and_fetch(AI+14, 7) != 7)
+    abort ();
+  if (__sync_or_and_fetch(AI+15, 8) != 8)
+    abort ();
+  if (__sync_xor_and_fetch(AI+16, 9) != 9)
+    abort ();
+  if (__sync_nand_and_fetch(AI+17, 7) != 7)
+    abort ();
+}
+
+static short AL[18];
+static short init_hi[18] = { 3,5,7,9,0,0,0,0,-1,0,0,0,0,0,-1,0,0,0 };
+static short test_hi[18] = { 3,5,7,9,1,4,22,-12,7,8,9,7,1,-12,7,8,9,7 };
+
+static void
+do_hi (void)
+{
+  if (__sync_fetch_and_add(AL+4, 1) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AL+5, 4) != 0)
+    abort ();
+  if (__sync_fetch_and_add(AL+6, 22) != 0)
+    abort ();
+  if (__sync_fetch_and_sub(AL+7, 12) != 0)
+    abort ();
+  if (__sync_fetch_and_and(AL+8, 7) != -1)
+    abort ();
+  if (__sync_fetch_and_or(AL+9, 8) != 0)
+    abort ();
+  if (__sync_fetch_and_xor(AL+10, 9) != 0)
+    abort ();
+  if (__sync_fetch_and_nand(AL+11, 7) != 0)
+    abort ();
+
+  if (__sync_add_and_fetch(AL+12, 1) != 1)
+    abort ();
+  if (__sync_sub_and_fetch(AL+13, 12) != -12)
+    abort ();
+  if (__sync_and_and_fetch(AL+14, 7) != 7)
+    abort ();
+  if (__sync_or_and_fetch(AL+15, 8) != 8)
+    abort ();
+  if (__sync_xor_and_fetch(AL+16, 9) != 9)
+    abort ();
+  if (__sync_nand_and_fetch(AL+17, 7) != 7)
+    abort ();
+}
+
+int main()
+{
+  memcpy(AI, init_qi, sizeof(init_qi));
+  memcpy(AL, init_hi, sizeof(init_hi));
+
+  do_qi ();
+  do_hi ();
+
+  if (memcmp (AI, test_qi, sizeof(test_qi)))
+    abort ();
+  if (memcmp (AL, test_hi, sizeof(test_hi)))
+    abort ();
+
+  return 0;
+}