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authoruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>2008-03-20 19:43:56 +0000
committeruros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>2008-03-20 19:43:56 +0000
commite101b9bf8101dbe59eb185e70db7ad293b3d71d6 (patch)
tree23f07de0427ac6daae86ea2a57019d5d1345cca1 /gcc/testsuite/gfortran.dg/vect/vect.exp
parent7eb0c1ab54a997d00fbd6d9f14507d7316da8f5f (diff)
downloadgcc-e101b9bf8101dbe59eb185e70db7ad293b3d71d6.tar.gz
PR testsuite/34168
* lib/target-supports.exp (check_sse2_hw_available): New procedure. * gcc.dg/vect/vect.exp: Set dg-do-what-default to "compile" if SSE2 hardware is not available. * g++.dg/vect/vect.exp: Update target-dependent overrides to match gcc.dg/vect/vect.exp. * gfortran.dg/vect/vect.exp: Ditto. (check_effective_target_lp64_or_vect_no_align): Remove procedure. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@133393 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gfortran.dg/vect/vect.exp')
-rw-r--r--gcc/testsuite/gfortran.dg/vect/vect.exp60
1 files changed, 41 insertions, 19 deletions
diff --git a/gcc/testsuite/gfortran.dg/vect/vect.exp b/gcc/testsuite/gfortran.dg/vect/vect.exp
index 9f91434a702..518b6850b6a 100644
--- a/gcc/testsuite/gfortran.dg/vect/vect.exp
+++ b/gcc/testsuite/gfortran.dg/vect/vect.exp
@@ -38,8 +38,18 @@ set save-dg-do-what-default ${dg-do-what-default}
# Skip these tests for targets that do not support generating vector
# code. Set additional target-dependent vector flags, which can be
# overridden by using dg-options in individual tests.
-if [istarget "powerpc*-*-*"] {
- # If there are powerpc targets to skip, do it here.
+if [istarget "powerpc-*paired*"] {
+ lappend DEFAULT_VECTCFLAGS "-mpaired"
+ if [check_750cl_hw_available] {
+ set dg-do-what-default run
+ } else {
+ set dg-do-what-default compile
+ }
+} elseif [istarget "powerpc*-*-*"] {
+ # Skip targets not supporting -maltivec.
+ if ![is-effective-target powerpc_altivec_ok] {
+ return
+ }
lappend DEFAULT_VECTCFLAGS "-maltivec"
if [check_vmx_hw_available] {
@@ -47,20 +57,38 @@ if [istarget "powerpc*-*-*"] {
} else {
if [is-effective-target ilp32] {
# Specify a cpu that supports VMX for compile-only tests.
- lappend DEFAULT_VECTCFLAGS "-mcpu=7400"
+ lappend DEFAULT_VECTCFLAGS "-mcpu=970"
}
set dg-do-what-default compile
}
+} elseif { [istarget "spu-*-*"] } {
+ set dg-do-what-default run
} elseif { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } {
lappend DEFAULT_VECTCFLAGS "-msse2"
- set dg-do-what-default run
-} elseif [istarget "mipsisa64*-*-*"] {
+ if [check_sse2_hw_available] {
+ set dg-do-what-default run
+ } else {
+ set dg-do-what-default compile
+ }
+} elseif { [istarget "mips*-*-*"]
+ && [check_effective_target_mpaired_single]
+ && [check_effective_target_nomips16] } {
lappend DEFAULT_VECTCFLAGS "-mpaired-single"
set dg-do-what-default run
} elseif [istarget "sparc*-*-*"] {
lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
- set dg-do-what-default run
+ if [check_effective_target_ultrasparc_hw] {
+ set dg-do-what-default run
+ } else {
+ set dg-do-what-default compile
+ }
} elseif [istarget "alpha*-*-*"] {
+ # Alpha's vectorization capabilities are extremely limited.
+ # It's more effort than its worth disabling all of the tests
+ # that it cannot pass. But if you actually want to see what
+ # does work, command out the return.
+ return
+
lappend DEFAULT_VECTCFLAGS "-mmax"
if [check_alpha_max_hw_available] {
set dg-do-what-default run
@@ -69,21 +97,15 @@ if [istarget "powerpc*-*-*"] {
}
} elseif [istarget "ia64-*-*"] {
set dg-do-what-default run
-} else {
- return
-}
-
-# Return 1 if the effective target is LP64 or if the effective target
-# does not support a vector alignment mechanism.
-
-proc check_effective_target_lp64_or_vect_no_align { } {
- if { [is-effective-target lp64]
- || [is-effective-target vect_no_align] } {
- set answer 1
+} elseif [is-effective-target arm_neon_ok] {
+ lappend DEFAULT_VECTCFLAGS "-mfpu=neon" "-mfloat-abi=softfp"
+ if [is-effective-target arm_neon_hw] {
+ set dg-do-what-default run
} else {
- set answer 0
+ set dg-do-what-default compile
}
- return $answer
+} else {
+ return
}
# Initialize `dg'.