diff options
| author | pinskia <pinskia@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-12-09 03:56:36 +0000 |
|---|---|---|
| committer | pinskia <pinskia@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-12-09 03:56:36 +0000 |
| commit | fe415b6999b98206f87c33de3dd70c10e6b6bf96 (patch) | |
| tree | e1c0463ca3f8de98aaa5a7e786cc5710377208ff /gcc/testsuite/gcc.target | |
| parent | ce9ff32cc628753b0112022b97bbdc4efe453b9e (diff) | |
| download | gcc-fe415b6999b98206f87c33de3dd70c10e6b6bf96.tar.gz | |
2011-12-08 Andrew Pinski <apinski@cavium.com>
* config/mips/mips-cpus.def (octeon+): New CPU.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.h (MIPS_CPP_SET_PROCESSOR): Emit '+' as 'P'.
2011-12-08 Andrew Pinski <apinski@cavium.com>
* cc.target/mips/mult-1.c: Forbid all Octeon processors.
* gcc.target/mips/dmult-1.c: Likewise.
* gcc.target/mips/branch-1.c: Likewise.
* gcc.target/mips/extend-1.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182152 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target')
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/branch-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/dmult-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/extend-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/mult-1.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/gcc/testsuite/gcc.target/mips/branch-1.c b/gcc/testsuite/gcc.target/mips/branch-1.c index 62d6bbb619a..2f4510f8dd6 100644 --- a/gcc/testsuite/gcc.target/mips/branch-1.c +++ b/gcc/testsuite/gcc.target/mips/branch-1.c @@ -2,7 +2,7 @@ but we test for "bbit" elsewhere. On other targets, we should implement the "if" statements using an "andi" instruction followed by a branch on zero. */ -/* { dg-options "-O2 forbid_cpu=octeon" } */ +/* { dg-options "-O2 forbid_cpu=octeon.*" } */ void bar (void); NOMIPS16 void f1 (int x) { if (x & 4) bar (); } diff --git a/gcc/testsuite/gcc.target/mips/dmult-1.c b/gcc/testsuite/gcc.target/mips/dmult-1.c index 517e43ed54b..f8c0b8b44f1 100644 --- a/gcc/testsuite/gcc.target/mips/dmult-1.c +++ b/gcc/testsuite/gcc.target/mips/dmult-1.c @@ -1,4 +1,4 @@ -/* { dg-options "forbid_cpu=octeon -mgp64" } */ +/* { dg-options "forbid_cpu=octeon.* -mgp64" } */ /* { dg-final { scan-assembler "\tdmult\t" } } */ /* { dg-final { scan-assembler "\tmflo\t" } } */ /* { dg-final { scan-assembler-not "\tdmul\t" } } */ diff --git a/gcc/testsuite/gcc.target/mips/extend-1.c b/gcc/testsuite/gcc.target/mips/extend-1.c index 4295106866b..5e9389060c8 100644 --- a/gcc/testsuite/gcc.target/mips/extend-1.c +++ b/gcc/testsuite/gcc.target/mips/extend-1.c @@ -1,4 +1,4 @@ -/* { dg-options "-O -mgp64 forbid_cpu=octeon" } */ +/* { dg-options "-O -mgp64 forbid_cpu=octeon.*" } */ /* { dg-final { scan-assembler-times "\tdsll\t" 5 } } */ /* { dg-final { scan-assembler-times "\tdsra\t" 5 } } */ /* { dg-final { scan-assembler-not "\tsll\t" } } */ diff --git a/gcc/testsuite/gcc.target/mips/mult-1.c b/gcc/testsuite/gcc.target/mips/mult-1.c index 43dd08c0b52..96961b0d85c 100644 --- a/gcc/testsuite/gcc.target/mips/mult-1.c +++ b/gcc/testsuite/gcc.target/mips/mult-1.c @@ -1,6 +1,6 @@ /* For SI->DI widening multiplication we should use DINS to combine the two halves. For Octeon use DMUL with explicit widening. */ -/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon" } */ +/* { dg-options "-O -mgp64 isa_rev>=2 forbid_cpu=octeon.*" } */ /* { dg-final { scan-assembler "\tdins\t" } } */ /* { dg-final { scan-assembler-not "\tdsll\t" } } */ /* { dg-final { scan-assembler-not "\tdsrl\t" } } */ |