* Merge from mainline rev 181122.transactional-memory

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/transactional-memory@181148 138bc75d-0d04-0410-961f-82ee72b054a4

13 files changed, 346 insertions, 0 deletions

diff --git a/gcc/testsuite/gcc.target/sparc/20111102-1.c b/gcc/testsuite/gcc.target/sparc/20111102-1.c
new file mode 100644
index 00000000000..d33f103e377
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/20111102-1.c
@@ -0,0 +1,17 @@
+/* PR target/50945 */
+/* { dg-do compile } */
+/* { dg-options "-O -msoft-float" } */
+
+double
+__powidf2 (double x, int m)
+{
+  unsigned int n = m < 0 ? -m : m;
+  double y = n % 2 ? x : 1;
+  while (n >>= 1)
+    {
+      x = x * x;
+      if (n % 2)
+	y = y * x;
+    }
+  return m < 0 ? 1/y : y;
+}
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1-vis1.c b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis1.c
new file mode 100644
index 00000000000..4202bfa6e72
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis1.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
+/* { dg-options "-mcpu=ultrasparc -mvis -O2" } */
+
+#include "vec-init-1.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1-vis2.c b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis2.c
new file mode 100644
index 00000000000..a5c21323936
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis2.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis2_hw } */
+/* { dg-options "-mcpu=ultrasparc3 -O2" } */
+
+#include "vec-init-1.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1-vis3.c b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis3.c
new file mode 100644
index 00000000000..ab916e052cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1-vis3.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis3_hw } */
+/* { dg-options "-mcpu=niagara3 -O2" } */
+
+#include "vec-init-1.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-1.inc b/gcc/testsuite/gcc.target/sparc/vec-init-1.inc
new file mode 100644
index 00000000000..e27bb6e293b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-1.inc
@@ -0,0 +1,85 @@
+typedef int __v1si __attribute__ ((__vector_size__ (4)));
+typedef int __v2si __attribute__ ((__vector_size__ (8)));
+typedef short __v2hi __attribute__ ((__vector_size__ (4)));
+typedef short __v4hi __attribute__ ((__vector_size__ (8)));
+typedef unsigned char __v4qi __attribute__ ((__vector_size__ (4)));
+typedef unsigned char __v8qi __attribute__ ((__vector_size__ (8)));
+
+extern void abort (void);
+
+static void
+compare64 (void *p, unsigned long long val)
+{
+  if (*(unsigned long long *)p != val)
+    abort();
+}
+
+static void
+compare32 (void *p, unsigned int val)
+{
+  if (*(unsigned int *)p != val)
+    abort();
+}
+
+static void
+test_v8qi (unsigned char x)
+{
+  __v8qi v = { x, x, x, x, x, x, x, x };
+
+  compare64(&v, 0x4444444444444444ULL);
+}
+
+static void
+test_v4qi (unsigned char x)
+{
+  __v4qi v = { x, x, x, x };
+
+  compare32(&v, 0x44444444);
+}
+
+static void
+test_v4hi (unsigned short x)
+{
+  __v4hi v = { x, x, x, x, };
+
+  compare64(&v, 0x3344334433443344ULL);
+}
+
+static void
+test_v2hi (unsigned short x)
+{
+  __v2hi v = { x, x, };
+
+  compare32(&v, 0x33443344);
+}
+
+static void
+test_v2si (unsigned int x)
+{
+  __v2si v = { x, x, };
+
+  compare64(&v, 0x1122334411223344ULL);
+}
+
+static void
+test_v1si (unsigned int x)
+{
+  __v1si v = { x };
+
+  compare32(&v, 0x11223344);
+}
+
+unsigned char x8 = 0x44;
+unsigned short x16 = 0x3344;
+unsigned int x32 = 0x11223344;
+
+int main(void)
+{
+  test_v8qi (x8);
+  test_v4qi (x8);
+  test_v4hi (x16);
+  test_v2hi (x16);
+  test_v2si (x32);
+  test_v1si (x32);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2-vis1.c b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis1.c
new file mode 100644
index 00000000000..efa08fa248c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis1.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
+/* { dg-options "-mcpu=ultrasparc -mvis -O2" } */
+
+#include "vec-init-2.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2-vis2.c b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis2.c
new file mode 100644
index 00000000000..3aa0f51595f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis2.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis2_hw } */
+/* { dg-options "-mcpu=ultrasparc3 -O2" } */
+
+#include "vec-init-2.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2-vis3.c b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis3.c
new file mode 100644
index 00000000000..5f0c65860bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2-vis3.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis3_hw } */
+/* { dg-options "-mcpu=niagara3 -O2" } */
+
+#include "vec-init-2.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-2.inc b/gcc/testsuite/gcc.target/sparc/vec-init-2.inc
new file mode 100644
index 00000000000..13685a1006e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-2.inc
@@ -0,0 +1,94 @@
+typedef short __v2hi __attribute__ ((__vector_size__ (4)));
+typedef short __v4hi __attribute__ ((__vector_size__ (8)));
+
+extern void abort (void);
+
+static void
+compare64 (int n, void *p, unsigned long long val)
+{
+  unsigned long long *x = (unsigned long long *) p;
+
+  if (*x != val)
+    abort();
+}
+
+static void
+compare32 (int n, void *p, unsigned int val)
+{
+  unsigned int *x = (unsigned int *) p;
+  if (*x != val)
+    abort();
+}
+
+#define V2HI_TEST(N, elt0, elt1) \
+static void \
+test_v2hi_##N (unsigned short x, unsigned short y) \
+{ \
+  __v2hi v = { (elt0), (elt1) }; \
+  compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
+}
+
+V2HI_TEST(1, x, y)
+V2HI_TEST(2, y, x)
+V2HI_TEST(3, x, x)
+V2HI_TEST(4, x, 0)
+V2HI_TEST(5, 0, x)
+V2HI_TEST(6, y, 1)
+V2HI_TEST(7, 1, y)
+V2HI_TEST(8, 2, 3)
+V2HI_TEST(9, 0x400, x)
+V2HI_TEST(10, y, 0x8000)
+
+#define V4HI_TEST(N, elt0, elt1, elt2, elt3)	\
+static void \
+test_v4hi_##N (unsigned short a, unsigned short b, unsigned short c, unsigned short d) \
+{ \
+  __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
+  compare64(N, &v, \
+            ((long long)(elt0) << 48) | \
+	    ((long long)(elt1) << 32) | \
+            ((long long)(elt2) << 16) | \
+            ((long long)(elt3))); \
+}
+
+V4HI_TEST(1, a, a, a, a)
+V4HI_TEST(2, a, b, c, d)
+V4HI_TEST(3, a, a, b, b)
+V4HI_TEST(4, d, c, b, a)
+V4HI_TEST(5, a, 0, 0, 0)
+V4HI_TEST(6, a, 0, b, 0)
+V4HI_TEST(7, c, 5, 5, 5)
+V4HI_TEST(8, d, 6, a, 6)
+V4HI_TEST(9, 0x200, 0x300, 0x500, 0x8800)
+V4HI_TEST(10, 0x600, a, a, a)
+
+unsigned short a16 = 0x3344;
+unsigned short b16 = 0x5566;
+unsigned short c16 = 0x7788;
+unsigned short d16 = 0x9911;
+
+int main(void)
+{
+  test_v2hi_1 (a16, b16);
+  test_v2hi_2 (a16, b16);
+  test_v2hi_3 (a16, b16);
+  test_v2hi_4 (a16, b16);
+  test_v2hi_5 (a16, b16);
+  test_v2hi_6 (a16, b16);
+  test_v2hi_7 (a16, b16);
+  test_v2hi_8 (a16, b16);
+  test_v2hi_9 (a16, b16);
+  test_v2hi_10 (a16, b16);
+
+  test_v4hi_1 (a16, b16, c16, d16);
+  test_v4hi_2 (a16, b16, c16, d16);
+  test_v4hi_3 (a16, b16, c16, d16);
+  test_v4hi_4 (a16, b16, c16, d16);
+  test_v4hi_5 (a16, b16, c16, d16);
+  test_v4hi_6 (a16, b16, c16, d16);
+  test_v4hi_7 (a16, b16, c16, d16);
+  test_v4hi_8 (a16, b16, c16, d16);
+  test_v4hi_9 (a16, b16, c16, d16);
+  test_v4hi_10 (a16, b16, c16, d16);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3-vis1.c b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis1.c
new file mode 100644
index 00000000000..6c826108c29
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis1.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_hw } */
+/* { dg-options "-mcpu=ultrasparc -mvis -O2" } */
+
+#include "vec-init-3.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3-vis2.c b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis2.c
new file mode 100644
index 00000000000..6424e2f1592
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis2.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis2_hw } */
+/* { dg-options "-mcpu=ultrasparc3 -O2" } */
+
+#include "vec-init-3.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c
new file mode 100644
index 00000000000..226c108c5e5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3-vis3.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-require-effective-target ultrasparc_vis3_hw } */
+/* { dg-options "-mcpu=niagara3 -O2" } */
+
+#include "vec-init-3.inc"
diff --git a/gcc/testsuite/gcc.target/sparc/vec-init-3.inc b/gcc/testsuite/gcc.target/sparc/vec-init-3.inc
new file mode 100644
index 00000000000..8a3db2600a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vec-init-3.inc
@@ -0,0 +1,105 @@
+typedef unsigned char __v4qi __attribute__ ((__vector_size__ (4)));
+typedef unsigned char __v8qi __attribute__ ((__vector_size__ (8)));
+
+extern void abort (void);
+
+static void
+compare64 (int n, void *p, unsigned long long val)
+{
+  unsigned long long *x = (unsigned long long *) p;
+
+  if (*x != val)
+    abort();
+}
+
+static void
+compare32 (int n, void *p, unsigned int val)
+{
+  unsigned int *x = (unsigned int *) p;
+  if (*x != val)
+    abort();
+}
+
+#define V4QI_TEST(N, elt0, elt1, elt2, elt3)	\
+static void \
+test_v4qi_##N (unsigned char a, unsigned char b, unsigned char c, unsigned char d) \
+{ \
+  __v4qi v = { (elt0), (elt1), (elt2), (elt3) };	\
+  compare32(N, &v, ((int)(elt0) << 24) | \
+	           ((int)(elt1) << 16) | \
+	           ((int)(elt2) << 8) | ((int)(elt3)));	\
+}
+
+V4QI_TEST(1, a, a, a, a)
+V4QI_TEST(2, b, b, b, b)
+V4QI_TEST(3, a, b, c, d)
+V4QI_TEST(4, d, c, b, a)
+V4QI_TEST(5, a, 0, 0, 0)
+V4QI_TEST(6, b, 1, 1, b)
+V4QI_TEST(7, c, 5, d, 5)
+V4QI_TEST(8, 0x20, 0x30, b, a)
+V4QI_TEST(9, 0x40, 0x50, 0x60, 0x70)
+V4QI_TEST(10, 0x40, 0x50, 0x60, c)
+
+#define V8QI_TEST(N, elt0, elt1, elt2, elt3, elt4, elt5, elt6, elt7) \
+static void \
+test_v8qi_##N (unsigned char a, unsigned char b, unsigned char c, unsigned char d, \
+               unsigned char e, unsigned char f, unsigned char g, unsigned char h) \
+{ \
+  __v8qi v = { (elt0), (elt1), (elt2), (elt3), \
+	       (elt4), (elt5), (elt6), (elt7) }; \
+  compare64(N, &v, ((long long)(elt0) << 56) | \
+	           ((long long)(elt1) << 48) | \
+	           ((long long)(elt2) << 40) | \
+	           ((long long)(elt3) << 32) | \
+	           ((long long)(elt4) << 24) | \
+	           ((long long)(elt5) << 16) | \
+	           ((long long)(elt6) << 8) | \
+	           ((long long)(elt7) << 0)); \
+}
+
+V8QI_TEST(1, a, a, a, a, a, a, a, a)
+V8QI_TEST(2, a, b, c, d, e, f, g, h)
+V8QI_TEST(3, h, g, f, e, d, c, b, a)
+V8QI_TEST(4, a, b, a, b, a, b, a, b)
+V8QI_TEST(5, c, b, c, b, c, b, c, a)
+V8QI_TEST(6, a, 0, 0, 0, 0, 0, 0, 0)
+V8QI_TEST(7, b, 1, b, 1, b, 1, b, 1)
+V8QI_TEST(8, c, d, 0x20, a, 0x21, b, 0x23, c)
+V8QI_TEST(9, 1, 2, 3, 4, 5, 6, 7, 8)
+V8QI_TEST(10, a, a, b, b, c, c, d, d)
+
+unsigned char a8 = 0x33;
+unsigned char b8 = 0x55;
+unsigned char c8 = 0x77;
+unsigned char d8 = 0x99;
+unsigned char e8 = 0x11;
+unsigned char f8 = 0x22;
+unsigned char g8 = 0x44;
+unsigned char h8 = 0x66;
+
+int main(void)
+{
+  test_v4qi_1 (a8, b8, c8, d8);
+  test_v4qi_2 (a8, b8, c8, d8);
+  test_v4qi_3 (a8, b8, c8, d8);
+  test_v4qi_4 (a8, b8, c8, d8);
+  test_v4qi_5 (a8, b8, c8, d8);
+  test_v4qi_6 (a8, b8, c8, d8);
+  test_v4qi_7 (a8, b8, c8, d8);
+  test_v4qi_8 (a8, b8, c8, d8);
+  test_v4qi_9 (a8, b8, c8, d8);
+  test_v4qi_10 (a8, b8, c8, d8);
+
+  test_v8qi_1 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_2 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_3 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_4 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_5 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_6 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_7 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_8 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_9 (a8, b8, c8, d8, e8, f8, g8, h8);
+  test_v8qi_10 (a8, b8, c8, d8, e8, f8, g8, h8);
+  return 0;
+}