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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-11-05 17:19:35 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@linaro.org> | 2017-11-05 17:19:35 +0000 |
| commit | 648f8fc59b2cc39abd24f4c22388b346cdebcc31 (patch) | |
| tree | 3a07eccc4c22b265261edd75c9ec3910d9c626f5 /gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c | |
| parent | 7bef5b82e4109778a0988d20e19e1ed29dadd835 (diff) | |
| parent | 8c089b5c15a7b35644750ca393f1e66071ad9aa9 (diff) | |
| download | gcc-648f8fc59b2cc39abd24f4c22388b346cdebcc31.tar.gz | |
Merge trunk into sve
Diffstat (limited to 'gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c')
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c b/gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c index 39c8ff43368..1bb84d80eb0 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c @@ -1,12 +1,15 @@ /* { dg-do compile } */ /* { dg-options "-O -march=armv8-a+sve -msve-vector-bits=256" } */ -typedef long v4di __attribute__((vector_size (32))); -typedef int v8si __attribute__((vector_size (32))); -typedef short v16hi __attribute__((vector_size (32))); -typedef char v32qi __attribute__((vector_size (32))); +#include <stdint.h> + +typedef int64_t v4di __attribute__((vector_size (32))); +typedef int32_t v8si __attribute__((vector_size (32))); +typedef int16_t v16hi __attribute__((vector_size (32))); +typedef int8_t v32qi __attribute__((vector_size (32))); typedef double v4df __attribute__((vector_size (32))); typedef float v8sf __attribute__((vector_size (32))); +typedef _Float16 v16hf __attribute__((vector_size (32))); #define UZP2(TYPE, MASK) \ TYPE uzp2_##TYPE (TYPE values1, TYPE values2) \ @@ -24,6 +27,8 @@ UZP2 (v32qi, ((v32qi) { 1, 3, 5, 7, 9, 11, 13, 15, 49, 51, 53, 55, 57, 59, 61, 63 })); UZP2 (v4df, ((v4di) { 1, 3, 5, 7 })); UZP2 (v8sf, ((v8si) { 1, 3, 5, 7, 9, 11, 13, 15 })); +UZP2 (v16hf, ((v16hi) { 1, 3, 5, 7, 9, 11, 13, 15, + 17, 19, 21, 23, 25, 27, 29, 31 })); /* { dg-final { scan-assembler-not {\ttbl\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} } } */ /* { dg-final { scan-assembler-not {\ttbl\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} } } */ @@ -32,5 +37,5 @@ UZP2 (v8sf, ((v8si) { 1, 3, 5, 7, 9, 11, 13, 15 })); /* { dg-final { scan-assembler-times {\tuzp2\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuzp2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ -/* { dg-final { scan-assembler-times {\tuzp2\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tuzp2\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ /* { dg-final { scan-assembler-times {\tuzp2\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b\n} 1 } } */ |