* target.h (init_dwarf_reg_sizes_extra): New target hook.

	* target-def.h (TARGET_INIT_DWARF_REG_SIZES_EXTRA): New default.
	* doc/tm.texi (TARGET_INIT_DWARF_REG_SIZES_EXTRA): Document.
	* dwarf2out.c (expand_builtin_init_dwarf_reg_sizes): Call this
	hook.
	* config/rs6000/rs6000.c (TARGET_INIT_DWARF_REG_SIZES_EXTRA,
	rs6000_init_dwarf_reg_sizes_extra): New.
	* config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Support
	SPE register high parts.

testsuite:
	* gcc.target/powerpc/spe-unwind-1.c, g++.dg/eh/simd-5.C: New
	tests.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122468 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 44 insertions, 0 deletions

diff --git a/gcc/testsuite/g++.dg/eh/simd-5.C b/gcc/testsuite/g++.dg/eh/simd-5.C
new file mode 100644
index 00000000000..d83d31392c6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/eh/simd-5.C
@@ -0,0 +1,44 @@
+// Test EH with V2SI SIMD registers actually restores correct values.
+// Origin: Joseph Myers <joseph@codesourcery.com>
+// { dg-options "-O" }
+// { dg-do run { target powerpc_spe } }
+
+extern "C" void abort (void);
+extern "C" int memcmp (const void *, const void *, __SIZE_TYPE__);
+typedef int __attribute__((vector_size (8))) v2si;
+
+v2si a = { 1, 2 };
+v2si b = { 3, 4 };
+v2si c = { 4, 6 };
+volatile v2si r;
+v2si r2;
+
+void
+f ()
+{
+  register v2si v asm("r15");
+  v = __builtin_spe_evaddw (b, c);
+  asm volatile ("" : "+r" (v));
+  r = v;
+  throw 1;
+}
+
+int
+main ()
+{
+  register v2si v asm("r15");
+  v = __builtin_spe_evaddw (a, b);
+  asm volatile ("" : "+r" (v));
+  try
+    {
+      f ();
+    }
+  catch (int)
+    {
+      r = v;
+      r2 = r;
+      if (memcmp (&r2, &c, sizeof (v2si)))
+	abort ();
+    }
+  return 0;
+}