2012-06-2 Kenneth Zadeck <zadeck@naturalbridge.com>

	* expmed.c (expand_mult, choose_multiplier): Change "2 *
	HOST_BITS_PER_WIDE_INT" to "HOST_BITS_PER_DOUBLE_INT".
	* expr.c (convert_modes): Likewise.
	* explow.c (plus_constant): Likewise.
	* fixed-value.c (fixed_saturate1, fixed_saturate2)
	(do_fixed_add, do_fixed_multiply, do_fixed_multiply)
	(do_fixed_multiply, do_fixed_multiply, do_fixed_divide)
	(do_fixed_divide, do_fixed_divide, do_fixed_divide)
	(do_fixed_divide, do_fixed_divide, do_fixed_shift, do_fixed_shift)
	(do_fixed_shift, fixed_convert, fixed_convert)
	(fixed_convert_from_int, fixed_convert_from_int)
	(fixed_convert_from_real): Likewise.
	* fold-const.c (fold_convert_const_int_from_fixed, sign_bit_p)
	(native_interpret_int, fold_binary_loc, fold_ternary_loc): Likewise.
	* varasm.c (output_constructor_bitfield): Likewise.
	* tree-vrp.c (register_edge_assert_for_2): Likewise.
	* double-int.c (rshift_double, lshift_double): Likewise.
	* double-int.h (double_int_fits_in_uhwi_p, double_int, double_int): Likewise.
	* simplify-rtx.c (mode_signbit_p)
	(simplify_const_unary_operation, simplify_binary_operation_1)
	(simplify_immed_subreg): Likewise.
	* builtins.c (c_readstr, fold_builtin_bitop): Likewise.
	* tree-vect-generic.c (build_replicated_const): Likewise.
	* dbxout.c (stabstr_O): Likewise.
	* emit-rtl.c (immed_double_int_const, immed_double_const)
	(gen_lowpart_common, init_emit_once): Likewise.
	* tree.c (integer_pow2p, tree_log2, tree_floor_log2)
	(widest_int_cst_value, upper_bound_in_type): Likewise.
	* stor-layout.c (initialize_sizetypes, fixup_signed_type)
	(fixup_unsigned_type): Likewise.
	* real.c (real_to_integer2, real_from_integer): Likewise.
	* dwarf2out.c (size_of_loc_descr, size_of_die, output_die)
	(clz_loc_descriptor, mem_loc_descriptor): Likewise.

From-SVN: r188139

1 files changed, 10 insertions, 10 deletions

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 6481a362d37..e43ee5bdf38 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -88,7 +88,7 @@ mode_signbit_p (enum machine_mode mode, const_rtx x)
   if (width <= HOST_BITS_PER_WIDE_INT
       && CONST_INT_P (x))
     val = INTVAL (x);
-  else if (width <= 2 * HOST_BITS_PER_WIDE_INT
+  else if (width <= HOST_BITS_PER_DOUBLE_INT
 	   && GET_CODE (x) == CONST_DOUBLE
 	   && CONST_DOUBLE_LOW (x) == 0)
     {
@@ -1356,7 +1356,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
 	lv = CONST_DOUBLE_LOW (op),  hv = CONST_DOUBLE_HIGH (op);
 
       if (op_mode == VOIDmode
-	  || GET_MODE_PRECISION (op_mode) > 2 * HOST_BITS_PER_WIDE_INT)
+	  || GET_MODE_PRECISION (op_mode) > HOST_BITS_PER_DOUBLE_INT)
 	/* We should never get a negative number.  */
 	gcc_assert (hv >= 0);
       else if (GET_MODE_PRECISION (op_mode) <= HOST_BITS_PER_WIDE_INT)
@@ -1517,7 +1517,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
   /* We can do some operations on integer CONST_DOUBLEs.  Also allow
      for a DImode operation on a CONST_INT.  */
   else if (GET_MODE (op) == VOIDmode
-	   && width <= HOST_BITS_PER_WIDE_INT * 2
+	   && width <= HOST_BITS_PER_DOUBLE_INT
 	   && (GET_CODE (op) == CONST_DOUBLE
 	       || CONST_INT_P (op)))
     {
@@ -1713,7 +1713,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
   else if (GET_CODE (op) == CONST_DOUBLE
 	   && SCALAR_FLOAT_MODE_P (GET_MODE (op))
 	   && GET_MODE_CLASS (mode) == MODE_INT
-	   && width <= 2 * HOST_BITS_PER_WIDE_INT && width > 0)
+	   && width <= HOST_BITS_PER_DOUBLE_INT && width > 0)
     {
       /* Although the overflow semantics of RTL's FIX and UNSIGNED_FIX
 	 operators are intentionally left unspecified (to ease implementation
@@ -1778,7 +1778,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
 	    return const0_rtx;
 
 	  /* Test against the unsigned upper bound.  */
-	  if (width == 2 * HOST_BITS_PER_WIDE_INT)
+	  if (width == HOST_BITS_PER_DOUBLE_INT)
 	    {
 	      th = -1;
 	      tl = -1;
@@ -2376,8 +2376,8 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
 	  && GET_MODE (op0) == mode
 	  && CONST_DOUBLE_LOW (trueop1) == 0
 	  && (val = exact_log2 (CONST_DOUBLE_HIGH (trueop1))) >= 0
-	  && (val < 2 * HOST_BITS_PER_WIDE_INT - 1
-	      || GET_MODE_BITSIZE (mode) <= 2 * HOST_BITS_PER_WIDE_INT))
+	  && (val < HOST_BITS_PER_DOUBLE_INT - 1
+	      || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_DOUBLE_INT))
 	return simplify_gen_binary (ASHIFT, mode, op0,
 				    GEN_INT (val + HOST_BITS_PER_WIDE_INT));
 
@@ -5216,7 +5216,7 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
 
 	      for (i = 0; i < HOST_BITS_PER_WIDE_INT; i += value_bit)
 		*vp++ = CONST_DOUBLE_LOW (el) >> i;
-	      while (i < HOST_BITS_PER_WIDE_INT * 2 && i < elem_bitsize)
+	      while (i < HOST_BITS_PER_DOUBLE_INT && i < elem_bitsize)
 		{
 		  *vp++
 		    = CONST_DOUBLE_HIGH (el) >> (i - HOST_BITS_PER_WIDE_INT);
@@ -5271,7 +5271,7 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
 	    {
 	      for (i = 0; i < HOST_BITS_PER_WIDE_INT; i += value_bit)
 		*vp++ = CONST_FIXED_VALUE_LOW (el) >> i;
-              for (; i < 2 * HOST_BITS_PER_WIDE_INT && i < elem_bitsize;
+              for (; i < HOST_BITS_PER_DOUBLE_INT && i < elem_bitsize;
 		   i += value_bit)
 		*vp++ = CONST_FIXED_VALUE_HIGH (el)
 			>> (i - HOST_BITS_PER_WIDE_INT);
@@ -5364,7 +5364,7 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
 	       know why.  */
 	    if (elem_bitsize <= HOST_BITS_PER_WIDE_INT)
 	      elems[elem] = gen_int_mode (lo, outer_submode);
-	    else if (elem_bitsize <= 2 * HOST_BITS_PER_WIDE_INT)
+	    else if (elem_bitsize <= HOST_BITS_PER_DOUBLE_INT)
 	      elems[elem] = immed_double_const (lo, hi, outer_submode);
 	    else
 	      return NULL_RTX;