gcc/

	* rtl.def (REG): Change format to "r".
	* rtl.h (rtunion): Remove rt_reg.
	(reg_info): New structure.
	(rtx_def): Add reg field to main union.
	(X0REGATTR): Delete.
	(REG_CHECK): New macro.
	(SET_REGNO_RAW, rhs_regno, REG_ATTRS): Use it.
	* rtl.c (rtx_format): Document "r".
	(rtx_code_size): Handle REG specially.
	* gengenrtl.c (special_format): Return true for formats
	that include 'r'.
	* gengtype.c (adjust_field_rtx_def): Handle 'r' fields.
	Deal with REG_ATTRS after the field loop.
	* emit-rtl.c (gen_raw_REG): Call rtx_alloc_stat directly.
	* expmed.c (init_expmed): Call gen_raw_REG instead of
	gen_rtx_raw_REG.
	* expr.c (init_expr_target): Likewise.
	* regcprop.c (maybe_mode_change): Likewise.
	* varasm.c (make_decl_rtl): Likewise.
	* final.c (leaf_renumber_regs_insn): Return early after
	handling REGs.
	* genemit.c (gen_exp): Handle 'r' fields.
	* genpeep.c (match_rtx): Likewise.
	* gensupport.c (subst_pattern_match): Likewise.
	(get_alternatives_number, collect_insn_data, alter_predicate_for_insn)
	(alter_constraints, subst_dup): Likewise.
	* read-rtl.c (read_rtx_code): Likewise.
	* print-rtl.c (print_rtx): Likewise.
	* genrecog.c (find_operand, find_matching_operand): Likewise.
	(validate_pattern, match_pattern_2): Likewise.
	(parameter::UINT, rtx_test::REGNO_FIELD): New enum values.
	(rtx_test::regno_field): New function.
	(operator ==, safe_to_hoist_p, transition_parameter_type)
	(parameter_type_string, print_parameter_value)
	(print_nonbool_test, print_test): Handle new enum values.
	* cselib.c (rtx_equal_for_cselib_1): Handle REG specially.
	* lra-constraints.c (operands_match_p): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@223339 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 23 insertions, 5 deletions

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 664d3fafad1..88aab6d3156 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -201,11 +201,21 @@ union rtunion
   tree rt_tree;
   basic_block rt_bb;
   mem_attrs *rt_mem;
-  reg_attrs *rt_reg;
   struct constant_descriptor_rtx *rt_constant;
   struct dw_cfi_node *rt_cfi;
 };
 
+/* Describes the properties of a REG.  */
+struct GTY(()) reg_info {
+  /* The value of REGNO.  */
+  unsigned int regno;
+
+  unsigned int unused : 32;
+
+  /* The value of REG_ATTRS.  */
+  reg_attrs *attrs;
+};
+
 /* This structure remembers the position of a SYMBOL_REF within an
    object_block structure.  A SYMBOL_REF only provides this information
    if SYMBOL_REF_HAS_BLOCK_INFO_P is true.  */
@@ -395,6 +405,7 @@ struct GTY((desc("0"), tag("0"),
   union u {
     rtunion fld[1];
     HOST_WIDE_INT hwint[1];
+    struct reg_info reg;
     struct block_symbol block_sym;
     struct real_value rv;
     struct fixed_value fv;
@@ -1070,6 +1081,13 @@ is_a_helper <rtx_note *>::test (rtx_insn *insn)
 				 __LINE__, __FUNCTION__);		\
    &_rtx->u.fv; })
 
+#define REG_CHECK(RTX) __extension__					\
+({ __typeof (RTX) const _rtx = (RTX);					\
+   if (GET_CODE (_rtx) != REG)						\
+     rtl_check_failed_code1 (_rtx, REG,  __FILE__, __LINE__,		\
+			     __FUNCTION__);				\
+   &_rtx->u.reg; })
+
 #define BLOCK_SYMBOL_CHECK(RTX) __extension__				\
 ({ __typeof (RTX) const _symbol = (RTX);				\
    const unsigned int flags = SYMBOL_REF_FLAGS (_symbol);		\
@@ -1124,6 +1142,7 @@ extern void rtvec_check_failed_bounds (const_rtvec, int, const char *, int,
 #define XCNMWINT(RTX, N, C, M)	    ((RTX)->u.hwint[N])
 #define XCNMPRV(RTX, C, M)	    (&(RTX)->u.rv)
 #define XCNMPFV(RTX, C, M)	    (&(RTX)->u.fv)
+#define REG_CHECK(RTX)		    (&(RTX)->u.reg)
 #define BLOCK_SYMBOL_CHECK(RTX)	    (&(RTX)->u.block_sym)
 #define HWIVEC_CHECK(RTX,C)	    (&(RTX)->u.hwiv)
 
@@ -1248,7 +1267,6 @@ extern void rtl_check_failed_flag (const char *, const_rtx, const char *,
 #define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags)
 #define X0CSELIB(RTX, N)   (RTL_CHECK1 (RTX, N, '0').rt_cselib)
 #define X0MEMATTR(RTX, N)  (RTL_CHECKC1 (RTX, N, MEM).rt_mem)
-#define X0REGATTR(RTX, N)  (RTL_CHECKC1 (RTX, N, REG).rt_reg)
 #define X0CONSTANT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_constant)
 
 /* Access a '0' field with any type.  */
@@ -1694,7 +1712,7 @@ inline rtx_insn *JUMP_LABEL_AS_INSN (const rtx_insn *insn)
    be used on RHS.  Use SET_REGNO to change the value.  */
 #define REGNO(RTX) (rhs_regno(RTX))
 #define SET_REGNO(RTX, N) (df_ref_change_reg_with_loc (RTX, N))
-#define SET_REGNO_RAW(RTX, N) (XCUINT (RTX, 0, REG) = N)
+#define SET_REGNO_RAW(RTX, N) (REG_CHECK (RTX)->regno = N)
 
 /* Return the number of consecutive registers in a REG.  This is always
    1 for pseudo registers and is determined by HARD_REGNO_NREGS for
@@ -1714,7 +1732,7 @@ inline rtx_insn *JUMP_LABEL_AS_INSN (const rtx_insn *insn)
 static inline unsigned int
 rhs_regno (const_rtx x)
 {
-  return XCUINT (x, 0, REG);
+  return REG_CHECK (x)->regno;
 }
 
 
@@ -2271,7 +2289,7 @@ do {								        \
 
 /* The register attribute block.  We provide access macros for each value
    in the block and provide defaults if none specified.  */
-#define REG_ATTRS(RTX) X0REGATTR (RTX, 1)
+#define REG_ATTRS(RTX) (REG_CHECK (RTX)->attrs)
 
 #ifndef GENERATOR_FILE
 /* For a MEM rtx, the alias set.  If 0, this MEM is not in any alias