2012-08-29 Basile Starynkevitch <basile@starynkevitch.net>

	MELT branch merged with trunk rev 190745 using svnmerge, notably
	C++ conversion.

[gcc/]
2012-08-29  Basile Starynkevitch  <basile@starynkevitch.net>
	{{merging with trunk, converted to C++}}

	* melt-runtime.h (MELT_FLEXIBLE_DIM): Set when C++.

	* melt-runtime.c (melt_tempdir_path): Don't use choose_tmpdir from
	libiberty.
	(meltgc_start_module_by_index): Use address-of & on VEC_index.
	(melt_really_initialize): When printing builtin settings, handle
	GCC 4.8 as with implicit ENABLE_BUILD_WITH_CXX.
	(meltgc_out_edge): Provide additional flag TDF_DETAILS for dump_edge_info.
	(melt_val2passflag): Handle PROP_referenced_vars only when defined.

	* melt-module.mk: Use GCCMELT_COMPILER instead of GCCMELT_CC.

	* melt-build-script.tpl: Transmit GCCMELT_COMPILER on every make
	using melt-module.mk and improve the error message.

	* melt-build-script.sh: Regenerate.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@190778 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 29 insertions, 21 deletions

diff --git a/gcc/reload1.c b/gcc/reload1.c
index 00980ce8786..77c7ba0911a 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -46,6 +46,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "ira.h"
 #include "target.h"
 #include "emit-rtl.h"
+#include "dumpfile.h"
 
 /* This file contains the reload pass of the compiler, which is
    run after register allocation has been done.  It checks that
@@ -663,7 +664,8 @@ grow_reg_equivs (void)
   for (i = old_size; i < max_regno; i++)
     {
       VEC_quick_insert (reg_equivs_t, reg_equivs, i, 0);
-      memset (VEC_index (reg_equivs_t, reg_equivs, i), 0, sizeof (reg_equivs_t));
+      memset (&VEC_index (reg_equivs_t, reg_equivs, i), 0,
+	      sizeof (reg_equivs_t));
     }
     
 }
@@ -2564,10 +2566,7 @@ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
 
   switch (code)
     {
-    case CONST_INT:
-    case CONST_DOUBLE:
-    case CONST_FIXED:
-    case CONST_VECTOR:
+    CASE_CONST_ANY:
     case CONST:
     case SYMBOL_REF:
     case CODE_LABEL:
@@ -2981,10 +2980,7 @@ elimination_effects (rtx x, enum machine_mode mem_mode)
 
   switch (code)
     {
-    case CONST_INT:
-    case CONST_DOUBLE:
-    case CONST_FIXED:
-    case CONST_VECTOR:
+    CASE_CONST_ANY:
     case CONST:
     case SYMBOL_REF:
     case CODE_LABEL:
@@ -4452,13 +4448,10 @@ scan_paradoxical_subregs (rtx x)
   switch (code)
     {
     case REG:
-    case CONST_INT:
     case CONST:
     case SYMBOL_REF:
     case LABEL_REF:
-    case CONST_DOUBLE:
-    case CONST_FIXED:
-    case CONST_VECTOR: /* shouldn't happen, but just in case.  */
+    CASE_CONST_ANY:
     case CC0:
     case PC:
     case USE:
@@ -8468,6 +8461,20 @@ emit_insn_if_valid_for_reload (rtx insn)
   return NULL;
 }
 
+#ifdef SECONDARY_MEMORY_NEEDED
+/* If X is not a subreg, return it unmodified.  If it is a subreg,
+   look up whether we made a replacement for the SUBREG_REG.  Return
+   either the replacement or the SUBREG_REG.  */
+
+static rtx
+replaced_subreg (rtx x)
+{
+  if (GET_CODE (x) == SUBREG)
+    return find_replacement (&SUBREG_REG (x));
+  return x;
+}
+#endif
+
 /* Emit code to perform a reload from IN (which may be a reload register) to
    OUT (which may also be a reload register).  IN or OUT is from operand
    OPNUM with reload type TYPE.
@@ -8479,6 +8486,9 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
 {
   rtx last = get_last_insn ();
   rtx tem;
+#ifdef SECONDARY_MEMORY_NEEDED
+  rtx tem1, tem2;
+#endif
 
   /* If IN is a paradoxical SUBREG, remove it and try to put the
      opposite SUBREG on OUT.  Likewise for a paradoxical SUBREG on OUT.  */
@@ -8615,14 +8625,12 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
 
 #ifdef SECONDARY_MEMORY_NEEDED
   /* If we need a memory location to do the move, do it that way.  */
-  else if ((REG_P (in)
-            || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
-	   && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
-	   && (REG_P (out)
-	       || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
-	   && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
-	   && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
-				       REGNO_REG_CLASS (reg_or_subregno (out)),
+  else if ((tem1 = replaced_subreg (in), tem2 = replaced_subreg (out),
+	    (REG_P (tem1) && REG_P (tem2)))
+	   && REGNO (tem1) < FIRST_PSEUDO_REGISTER
+	   && REGNO (tem2) < FIRST_PSEUDO_REGISTER
+	   && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (tem1)),
+				       REGNO_REG_CLASS (REGNO (tem2)),
 				       GET_MODE (out)))
     {
       /* Get the memory to use and rewrite both registers to its mode.  */