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| author | Richard Henderson <rth@cygnus.com> | 1999-09-12 05:46:08 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 1999-09-12 05:46:08 -0700 |
| commit | a995e389c4aed94fbfc35bd283ade7dd775add7c (patch) | |
| tree | c2582159a30e1f83f4d7b7bcd2806fb8331123b2 /gcc/reload1.c | |
| parent | ddf16f18413b904c1b524e9d385aabd394fa5d7b (diff) | |
| download | gcc-a995e389c4aed94fbfc35bd283ade7dd775add7c.tar.gz | |
Replace insn_foo with insn_data.foo.
From-SVN: r29358
Diffstat (limited to 'gcc/reload1.c')
| -rw-r--r-- | gcc/reload1.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/gcc/reload1.c b/gcc/reload1.c index c8a914af91b..fdbc9459375 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -6816,7 +6816,7 @@ emit_reload_insns (chain) /* Make sure we can access insn_operand_constraint. */ && asm_noperands (PATTERN (temp)) < 0 /* This is unsafe if prev insn rejects our reload reg. */ - && constraint_accepts_reg_p (insn_operand_constraint[recog_memoized (temp)][0], + && constraint_accepts_reg_p (insn_data[recog_memoized (temp)].operand[0].constraint, reloadreg) /* This is unsafe if operand occurs more than once in current insn. Perhaps some occurrences aren't reloaded. */ @@ -6945,18 +6945,18 @@ emit_reload_insns (chain) { new_icode = reload_in_optab[(int) mode]; if (new_icode != CODE_FOR_nothing - && ((insn_operand_predicate[(int) new_icode][0] - && ! ((*insn_operand_predicate[(int) new_icode][0]) + && ((insn_data[(int) new_icode].operand[0].predicate + && ! ((*insn_data[(int) new_icode].operand[0].predicate) (reloadreg, mode))) - || (insn_operand_predicate[(int) new_icode][1] - && ! ((*insn_operand_predicate[(int) new_icode][1]) + || (insn_data[(int) new_icode].operand[1].predicate + && ! ((*insn_data[(int) new_icode].operand[1].predicate) (real_oldequiv, mode))))) new_icode = CODE_FOR_nothing; if (new_icode == CODE_FOR_nothing) new_mode = mode; else - new_mode = insn_operand_mode[(int) new_icode][2]; + new_mode = insn_data[(int) new_icode].operand[2].mode; if (GET_MODE (second_reload_reg) != new_mode) { @@ -7840,7 +7840,8 @@ gen_reload (out, in, opnum, type) || (GET_CODE (op1) == REG && REGNO (op1) >= FIRST_PSEUDO_REGISTER) || (code != CODE_FOR_nothing - && ! (*insn_operand_predicate[code][2]) (op1, insn_operand_mode[code][2]))) + && ! ((*insn_data[code].operand[2].predicate) + (op1, insn_data[code].operand[2].mode)))) tem = op0, op0 = op1, op1 = tem; gen_reload (out, op0, opnum, type); |