* config/bfin/bfin-protos.h (bfin_dsp_memref_p): Declare.

	* config/bfin/bfin.c (bfin_dsp_memref_p): New function.
	(bfin_valid_reg_p): Test for pseudos explicitly and use only
	REGNO_MODE_CODE_OK_FOR_BASE_P.  New args MODE and OUTER_CODE; all
	callers changed.
	* config/bfin/bfin.h (PREG_P): Use P_REGNO_P.
	(IREG_P, P_REGNO_P, I_REGNO_P): New macros.
	(enum reg_class, REG_CLASS_CONTENTS): Add IPREGS.
	(BASE_REG_CLASS, REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P,
	REGNO_OK_FOR_BASE_STRICT_P, REGNO_OK_FOR_BASE_NONSTRICT_P): Delete
	macros.
	(IREG_POSSIBLE_P, MODE_CODE_BASE_REG_CLASS,
	REGNO_MODE_CODE_OK_FOR_BASE_P): New macros.
	(REGNO_REG_CLASS): ARGP is in PREGS.
	* config/bfin/bfin.md (movhi_insn): Allow for addresses containing
	IREGS.
	(zero_extendhisi2, extendhisi2): Likewise; changed to define_and_split
	to deal with those addresses.
	* addresses.h: New file.
	* caller-save.c: Include "addresses.h".
	(init_caller_save): Use new base_reg_class function.
	* rtl-factoring.c: Include "addresses.h".
	(recompute_gain_for_pattern_seq): Use new function ok_for_base_p_1.
	* recog.c: Include "addresses.h".
	(preprocess_constraints): Use new base_reg_class function.
	* regrename.c: Include "addresses.h".
	(scan_rtx_address): Use new regno_ok_for_base_p and base_reg_class
	functions.  Keep track of a new var INDEX_CODE to compute valid
	classes.
	(replace_oldest_value_addr): Likewise.
	(replace_oldest_value_mem): Use base_reg_class.
	* reload.c: Include "addresses.h".
	(REGNO_MODE_OK_FOR_BASE_P, REG_MODE_OK_FOR_BASE_P): Delete macros.
	(find_reloads): Use new base_reg_class function.
	(find_reloads_address): Likewise; also use regno_ok_for_base_p.
	(find_reloads_address_1): Likewise. New args OUTER_CODE and INDEX_CODE;
	all callers and prototype changed.
	* reload1.c: Include "addresses.h".
	(maybe_fix_stack_asms): Use base_reg_class.
	* regclass.c: Include "addresses.h".
	(ok_for_index_p_nonstrict, ok_for_base_p_nonstrict): New functions.
	(init_reg_autoinc): Use new base_reg_class function.
	(record_reg_classes): Likewise.
	(record_address_regs): Delete arg CLASS; add args CONTEXT, MODE,
	OUTER_CODE and INDEX_CODE.  All callers and prototype changed.
	Use new args to compute necessary class.

	* Makefile.in (regclass.o, reload.o, reload1.o, caller-save.o, recog.o,
	regrename.o, rtl-factoring.o): Update dependencies.
	* doc/tm.texi (MODE_CODE_BASE_REG_CLASS): Document.
	(REGNO_MODE_CODE_OK_FOR_BASE_P): Likewise.
	(REG_OK_FOR_BASE_P, REG_MODE_OK_FOR_BASE_P, REG_MODE_OK_FOR_REG_BASE_P,
	REG_OK_FOR_INDEX_P): Delete documentation.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@112248 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 55 insertions, 33 deletions

diff --git a/gcc/regrename.c b/gcc/regrename.c
index 49e18c4a7c2..ebb7cbb5fab 100644
--- a/gcc/regrename.c
+++ b/gcc/regrename.c
@@ -27,6 +27,7 @@
 #include "tm_p.h"
 #include "insn-config.h"
 #include "regs.h"
+#include "addresses.h"
 #include "hard-reg-set.h"
 #include "basic-block.h"
 #include "reload.h"
@@ -528,7 +529,7 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl,
 	rtx op1 = orig_op1;
 	rtx *locI = NULL;
 	rtx *locB = NULL;
-	rtx *locB_reg = NULL;
+	enum rtx_code index_code;
 
 	if (GET_CODE (op0) == SUBREG)
 	  {
@@ -547,59 +548,70 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl,
 	  {
 	    locI = &XEXP (x, 0);
 	    locB = &XEXP (x, 1);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
 		 || code1 == ZERO_EXTEND || code0 == MEM)
 	  {
 	    locI = &XEXP (x, 1);
 	    locB = &XEXP (x, 0);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code0 == CONST_INT || code0 == CONST
 		 || code0 == SYMBOL_REF || code0 == LABEL_REF)
-	  locB = &XEXP (x, 1);
+	  {
+	    locB = &XEXP (x, 1);
+	    index_code = GET_CODE (XEXP (x, 0));
+	  }
 	else if (code1 == CONST_INT || code1 == CONST
 		 || code1 == SYMBOL_REF || code1 == LABEL_REF)
-	  locB = &XEXP (x, 0);
+	  {
+	    locB = &XEXP (x, 0);
+	    index_code = GET_CODE (XEXP (x, 1));
+	  }
 	else if (code0 == REG && code1 == REG)
 	  {
 	    int index_op;
+	    unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
 
-	    if (REG_OK_FOR_INDEX_P (op0)
-		&& REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
+	    if (REGNO_OK_FOR_INDEX_P (regno0)
+		&& regno_ok_for_base_p (regno1, mode, PLUS, REG))
 	      index_op = 0;
-	    else if (REG_OK_FOR_INDEX_P (op1)
-		     && REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
+	    else if (REGNO_OK_FOR_INDEX_P (regno1)
+		     && regno_ok_for_base_p (regno0, mode, PLUS, REG))
 	      index_op = 1;
-	    else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
+	    else if (regno_ok_for_base_p (regno1, mode, PLUS, REG))
 	      index_op = 0;
-	    else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
+	    else if (regno_ok_for_base_p (regno0, mode, PLUS, REG))
 	      index_op = 1;
-	    else if (REG_OK_FOR_INDEX_P (op1))
+	    else if (REGNO_OK_FOR_INDEX_P (regno1))
 	      index_op = 1;
 	    else
 	      index_op = 0;
 
 	    locI = &XEXP (x, index_op);
-	    locB_reg = &XEXP (x, !index_op);
+	    locB = &XEXP (x, !index_op);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code0 == REG)
 	  {
 	    locI = &XEXP (x, 0);
 	    locB = &XEXP (x, 1);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code1 == REG)
 	  {
 	    locI = &XEXP (x, 1);
 	    locB = &XEXP (x, 0);
+	    index_code = GET_CODE (*locI);
 	  }
 
 	if (locI)
 	  scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode);
 	if (locB)
-	  scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode);
-	if (locB_reg)
-	  scan_rtx_address (insn, locB_reg, MODE_BASE_REG_REG_CLASS (mode),
+	  scan_rtx_address (insn, locB, base_reg_class (mode, PLUS, index_code),
 			    action, mode);
+
 	return;
       }
 
@@ -618,7 +630,7 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl,
 
     case MEM:
       scan_rtx_address (insn, &XEXP (x, 0),
-			MODE_BASE_REG_CLASS (GET_MODE (x)), action,
+			base_reg_class (GET_MODE (x), MEM, SCRATCH), action,
 			GET_MODE (x));
       return;
 
@@ -669,7 +681,7 @@ scan_rtx (rtx insn, rtx *loc, enum reg_class cl,
 
     case MEM:
       scan_rtx_address (insn, &XEXP (x, 0),
-			MODE_BASE_REG_CLASS (GET_MODE (x)), action,
+			base_reg_class (GET_MODE (x), MEM, SCRATCH), action,
 			GET_MODE (x));
       return;
 
@@ -1441,7 +1453,7 @@ replace_oldest_value_addr (rtx *loc, enum reg_class cl,
 	rtx op1 = orig_op1;
 	rtx *locI = NULL;
 	rtx *locB = NULL;
-	rtx *locB_reg = NULL;
+	enum rtx_code index_code;
 
 	if (GET_CODE (op0) == SUBREG)
 	  {
@@ -1460,50 +1472,62 @@ replace_oldest_value_addr (rtx *loc, enum reg_class cl,
 	  {
 	    locI = &XEXP (x, 0);
 	    locB = &XEXP (x, 1);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
 		 || code1 == ZERO_EXTEND || code0 == MEM)
 	  {
 	    locI = &XEXP (x, 1);
 	    locB = &XEXP (x, 0);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code0 == CONST_INT || code0 == CONST
 		 || code0 == SYMBOL_REF || code0 == LABEL_REF)
-	  locB = &XEXP (x, 1);
+	  {
+	    locB = &XEXP (x, 1);
+	    index_code = GET_CODE (XEXP (x, 0));
+	  }
 	else if (code1 == CONST_INT || code1 == CONST
 		 || code1 == SYMBOL_REF || code1 == LABEL_REF)
-	  locB = &XEXP (x, 0);
+	  {
+	    locB = &XEXP (x, 0);
+	    index_code = GET_CODE (XEXP (x, 1));
+	  }
 	else if (code0 == REG && code1 == REG)
 	  {
 	    int index_op;
+	    unsigned regno0 = REGNO (op0), regno1 = REGNO (op1);
 
-	    if (REG_OK_FOR_INDEX_P (op0)
-		&& REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
+	    if (REGNO_OK_FOR_INDEX_P (regno0)
+		&& regno_ok_for_base_p (regno1, mode, PLUS, REG))
 	      index_op = 0;
-	    else if (REG_OK_FOR_INDEX_P (op1)
-		     && REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
+	    else if (REGNO_OK_FOR_INDEX_P (regno1)
+		     && regno_ok_for_base_p (regno0, mode, PLUS, REG))
 	      index_op = 1;
-	    else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
+	    else if (regno_ok_for_base_p (regno1, mode, PLUS, REG))
 	      index_op = 0;
-	    else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
+	    else if (regno_ok_for_base_p (regno0, mode, PLUS, REG))
 	      index_op = 1;
-	    else if (REG_OK_FOR_INDEX_P (op1))
+	    else if (REGNO_OK_FOR_INDEX_P (regno1))
 	      index_op = 1;
 	    else
 	      index_op = 0;
 
 	    locI = &XEXP (x, index_op);
-	    locB_reg = &XEXP (x, !index_op);
+	    locB = &XEXP (x, !index_op);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code0 == REG)
 	  {
 	    locI = &XEXP (x, 0);
 	    locB = &XEXP (x, 1);
+	    index_code = GET_CODE (*locI);
 	  }
 	else if (code1 == REG)
 	  {
 	    locI = &XEXP (x, 1);
 	    locB = &XEXP (x, 0);
+	    index_code = GET_CODE (*locI);
 	  }
 
 	if (locI)
@@ -1511,11 +1535,8 @@ replace_oldest_value_addr (rtx *loc, enum reg_class cl,
 						insn, vd);
 	if (locB)
 	  changed |= replace_oldest_value_addr (locB,
-						MODE_BASE_REG_CLASS (mode),
-						mode, insn, vd);
-	if (locB_reg)
-	  changed |= replace_oldest_value_addr (locB_reg,
-						MODE_BASE_REG_REG_CLASS (mode),
+						base_reg_class (mode, PLUS,
+								index_code),
 						mode, insn, vd);
 	return changed;
       }
@@ -1559,7 +1580,8 @@ static bool
 replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd)
 {
   return replace_oldest_value_addr (&XEXP (x, 0),
-				    MODE_BASE_REG_CLASS (GET_MODE (x)),
+				    base_reg_class (GET_MODE (x), MEM,
+						    SCRATCH),
 				    GET_MODE (x), insn, vd);
 }