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authordrow <drow@138bc75d-0d04-0410-961f-82ee72b054a4>2004-10-12 19:28:56 +0000
committerdrow <drow@138bc75d-0d04-0410-961f-82ee72b054a4>2004-10-12 19:28:56 +0000
commit6006f9fd085c65362c5c9a9622e3f127e83420cb (patch)
tree32fb1749887c1bb5a4613d1d87b18c9a8537c8f4 /gcc/regclass.c
parent27bfe4941e3c5a748285d86747bd1cf891cac299 (diff)
downloadgcc-6006f9fd085c65362c5c9a9622e3f127e83420cb.tar.gz
* defaults.h (REGNO_MODE_OK_FOR_BASE_P, REG_MODE_OK_FOR_BASE_P)
(MODE_BASE_REG_REG_CLASS, REGNO_MODE_OK_FOR_REG_BASE_P) (REG_MODE_OK_FOR_REG_BASE_P): Provide default definitions. * regclass.c (record_address_regs): Remove ifdef. Use REG_MODE_OK_FOR_REG_BASE_P and MODE_BASE_REG_REG_CLASS. * regrename.c (REG_MODE_OK_FOR_BASE_P): Remove unnecessary definition. (scan_rtx_address, replace_oldest_value_addr): Use REG_MODE_OK_FOR_REG_BASE_P and MODE_BASE_REG_REG_CLASS. * reload.c (REGNO_MODE_OK_FOR_BASE_P, REG_MODE_OK_FOR_BASE_P): Remove unnecessary definitions. (find_reloads_address_1): Support REG_MODE_OK_FOR_REG_BASE_P and MODE_BASE_REG_REG_CLASS. * config/arm/arm.h (MODE_BASE_REG_CLASS): Don't check reload_completed. (MODE_BASE_REG_REG_CLASS): Define. (REGNO_MODE_OK_FOR_REG_BASE_P): Define. (REG_MODE_OK_FOR_REG_BASE_P): Define. * doc/tm.texi (Register Classes): Document MODE_BASE_REG_REG_CLASS, REG_MODE_OK_FOR_REG_BASE_P, and REGNO_MODE_OK_FOR_REG_BASE_P. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@88948 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/regclass.c')
-rw-r--r--gcc/regclass.c32
1 files changed, 18 insertions, 14 deletions
diff --git a/gcc/regclass.c b/gcc/regclass.c
index 3e2af72ba89..c3abadd557a 100644
--- a/gcc/regclass.c
+++ b/gcc/regclass.c
@@ -2011,25 +2011,27 @@ record_address_regs (rtx x, enum reg_class class, int scale)
record_address_regs (arg0, INDEX_REG_CLASS, scale);
/* If both operands are registers but one is already a hard register
- of index or base class, give the other the class that the hard
- register is not. */
+ of index or reg-base class, give the other the class that the
+ hard register is not. */
-#ifdef REG_OK_FOR_BASE_P
else if (code0 == REG && code1 == REG
&& REGNO (arg0) < FIRST_PSEUDO_REGISTER
- && (REG_OK_FOR_BASE_P (arg0) || REG_OK_FOR_INDEX_P (arg0)))
+ && (REG_MODE_OK_FOR_REG_BASE_P (arg0, VOIDmode)
+ || REG_OK_FOR_INDEX_P (arg0)))
record_address_regs (arg1,
- REG_OK_FOR_BASE_P (arg0)
- ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (VOIDmode),
+ REG_MODE_OK_FOR_REG_BASE_P (arg0, VOIDmode)
+ ? INDEX_REG_CLASS
+ : MODE_BASE_REG_REG_CLASS (VOIDmode),
scale);
else if (code0 == REG && code1 == REG
&& REGNO (arg1) < FIRST_PSEUDO_REGISTER
- && (REG_OK_FOR_BASE_P (arg1) || REG_OK_FOR_INDEX_P (arg1)))
+ && (REG_MODE_OK_FOR_REG_BASE_P (arg1, VOIDmode)
+ || REG_OK_FOR_INDEX_P (arg1)))
record_address_regs (arg0,
- REG_OK_FOR_BASE_P (arg1)
- ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (VOIDmode),
+ REG_MODE_OK_FOR_REG_BASE_P (arg1, VOIDmode)
+ ? INDEX_REG_CLASS
+ : MODE_BASE_REG_REG_CLASS (VOIDmode),
scale);
-#endif
/* If one operand is known to be a pointer, it must be the base
with the other operand the index. Likewise if the other operand
@@ -2038,14 +2040,16 @@ record_address_regs (rtx x, enum reg_class class, int scale)
else if ((code0 == REG && REG_POINTER (arg0))
|| code1 == MULT)
{
- record_address_regs (arg0, MODE_BASE_REG_CLASS (VOIDmode), scale);
+ record_address_regs (arg0, MODE_BASE_REG_REG_CLASS (VOIDmode),
+ scale);
record_address_regs (arg1, INDEX_REG_CLASS, scale);
}
else if ((code1 == REG && REG_POINTER (arg1))
|| code0 == MULT)
{
record_address_regs (arg0, INDEX_REG_CLASS, scale);
- record_address_regs (arg1, MODE_BASE_REG_CLASS (VOIDmode), scale);
+ record_address_regs (arg1, MODE_BASE_REG_REG_CLASS (VOIDmode),
+ scale);
}
/* Otherwise, count equal chances that each might be a base
@@ -2053,10 +2057,10 @@ record_address_regs (rtx x, enum reg_class class, int scale)
else
{
- record_address_regs (arg0, MODE_BASE_REG_CLASS (VOIDmode),
+ record_address_regs (arg0, MODE_BASE_REG_REG_CLASS (VOIDmode),
scale / 2);
record_address_regs (arg0, INDEX_REG_CLASS, scale / 2);
- record_address_regs (arg1, MODE_BASE_REG_CLASS (VOIDmode),
+ record_address_regs (arg1, MODE_BASE_REG_REG_CLASS (VOIDmode),
scale / 2);
record_address_regs (arg1, INDEX_REG_CLASS, scale / 2);
}