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authorJim MacArthur <jim.macarthur@arm.com>2012-05-24 11:07:57 +0000
committerMarcus Shawcroft <mshawcroft@gcc.gnu.org>2012-05-24 11:07:57 +0000
commite7bcc691204350945d31fcb27b6d421cdf6d8453 (patch)
treed2f0426293ac9bb76b776e8b899cf5ed99edfaf4 /gcc/recog.c
parentb44be1e6cfcd00aa166e84d006232d9ddeda7b6f (diff)
downloadgcc-e7bcc691204350945d31fcb27b6d421cdf6d8453.tar.gz
recog.c (reg_fits_class_p): Check both regno and regno + offset are hard registers.
2012-05-24 Jim MacArthur<jim.macarthur@arm.com> * recog.c (reg_fits_class_p): Check both regno and regno + offset are hard registers. * regs.h (in_hard_reg_set_p): Assert that regno is a hard register and check end_regno - 1 is a hard register. From-SVN: r187826
Diffstat (limited to 'gcc/recog.c')
-rw-r--r--gcc/recog.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/gcc/recog.c b/gcc/recog.c
index c5725d2abdf..d6645942cc7 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -2792,14 +2792,16 @@ bool
reg_fits_class_p (const_rtx operand, reg_class_t cl, int offset,
enum machine_mode mode)
{
- int regno = REGNO (operand);
+ unsigned int regno = REGNO (operand);
if (cl == NO_REGS)
return false;
+ /* Regno must not be a pseudo register. Offset may be negative. */
return (HARD_REGISTER_NUM_P (regno)
- && in_hard_reg_set_p (reg_class_contents[(int) cl],
- mode, regno + offset));
+ && HARD_REGISTER_NUM_P (regno + offset)
+ && in_hard_reg_set_p (reg_class_contents[(int) cl], mode,
+ regno + offset));
}
/* Split single instruction. Helper function for split_all_insns and