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author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-10-22 12:02:11 +0000 |
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committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-10-22 12:02:11 +0000 |
commit | e1a797ade2cd2dffe3e9ff73826422700f010c84 (patch) | |
tree | 69a28087e5d6c8f66821aa2540f8d19983b792eb /gcc/postreload.c | |
parent | 835b8178b6af49b010c32136c5aa49227d562691 (diff) | |
download | gcc-e1a797ade2cd2dffe3e9ff73826422700f010c84.tar.gz |
gcc/
* doc/md.texi: Document "preferred_for_size" and "preferred_for_speed"
attributes.
* genattr.c (main): Handle "preferred_for_size" and
"preferred_for_speed" in the same way as "enabled".
* recog.h (bool_attr): New enum.
(target_recog): Replace x_enabled_alternatives with x_bool_attr_masks.
(get_preferred_alternatives, check_bool_attrs): Declare.
* recog.c (have_bool_attr, get_bool_attr, get_bool_attr_mask_uncached)
(get_bool_attr_mask, get_preferred_alternatives, check_bool_attrs):
New functions.
(get_enabled_alternatives): Use get_bool_attr_mask.
* ira-costs.c (record_reg_classes): Use get_preferred_alternatives
instead of recog_data.enabled_alternatives.
* ira.c (ira_setup_alts): Likewise.
* postreload.c (reload_cse_simplify_operands): Likewise.
* config/i386/i386.c (ix86_legitimate_combined_insn): Likewise.
* ira-lives.c (preferred_alternatives): New variable.
(process_bb_node_lives): Set it.
(check_and_make_def_conflict, make_early_clobber_and_input_conflicts)
(single_reg_class, ira_implicitly_set_insn_hard_regs): Use it instead
of recog_data.enabled_alternatives.
* lra-int.h (lra_insn_recog_data): Replace enabled_alternatives
to preferred_alternatives.
* lra-constraints.c (process_alt_operands): Update accordingly.
* lra.c (lra_set_insn_recog_data): Likewise.
(lra_update_insn_recog_data): Assert check_bool_attrs.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216554 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/postreload.c')
-rw-r--r-- | gcc/postreload.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/postreload.c b/gcc/postreload.c index f460bf3a3a4..dcdfedfd920 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -497,6 +497,7 @@ reload_cse_simplify_operands (rtx_insn *insn, rtx testreg) SET_HARD_REG_BIT (equiv_regs[i], REGNO (l->loc)); } + alternative_mask preferred = get_preferred_alternatives (insn); for (i = 0; i < recog_data.n_operands; i++) { enum machine_mode mode; @@ -570,7 +571,7 @@ reload_cse_simplify_operands (rtx_insn *insn, rtx testreg) alternative yet and the operand being replaced is not a cheap CONST_INT. */ if (op_alt_regno[i][j] == -1 - && TEST_BIT (recog_data.enabled_alternatives, j) + && TEST_BIT (preferred, j) && reg_fits_class_p (testreg, rclass, 0, mode) && (!CONST_INT_P (recog_data.operand[i]) || (set_src_cost (recog_data.operand[i], |