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| author | hubicka <hubicka@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-01-07 21:09:21 +0000 |
|---|---|---|
| committer | hubicka <hubicka@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-01-07 21:09:21 +0000 |
| commit | d3da2ad8e95b5abd486ef73add1c616d7d59104f (patch) | |
| tree | 0f2ce69928d0a8166860b927857a84fead2f2d9f /gcc/optabs.c | |
| parent | 24d1674dc6c5761fba6ac10de9d018ed2bdf4e21 (diff) | |
| download | gcc-d3da2ad8e95b5abd486ef73add1c616d7d59104f.tar.gz | |
* genopinit.c (optabs): Add addc_optab.
* ifcvt.c (noce_try_store_flag): Rename to ...
(noce_try_addcc): ... this one; handle generic conditional increment.
(noce_process_if_block): Update noce_try_addcc call.
* optabs.c (emit_conditional_add): New.
(init_obtabs): Initialize addc_optab.
* optabs.h (optab_index): Add OTI_addcc.
(addcc_optab): New macro.
* md.texi: Document addMcc
PR target/8322
* i386.c (ix86_init_mmx_sse_builtins): Constify arguments of loads.
* xmmintrin.h (_mm_load*_si128. _mm_store*_si128): Add casts.
* xmmintrin.h (_mm_load*_si128. _mm_store*_si128): Add casts.
* reload1.c (delete_output_reload): Avoid repeated attempts
to delete insn.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@61019 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/optabs.c')
| -rw-r--r-- | gcc/optabs.c | 129 |
1 files changed, 129 insertions, 0 deletions
diff --git a/gcc/optabs.c b/gcc/optabs.c index 9aa2e4ae3f8..3956299e4ea 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -4230,6 +4230,134 @@ can_conditionally_move_p (mode) } #endif /* HAVE_conditional_move */ + +/* Emit a conditional addition instruction if the machine supports one for that + condition and machine mode. + + OP0 and OP1 are the operands that should be compared using CODE. CMODE is + the mode to use should they be constants. If it is VOIDmode, they cannot + both be constants. + + OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3 + should be stored there. MODE is the mode to use should they be constants. + If it is VOIDmode, they cannot both be constants. + + The result is either TARGET (perhaps modified) or NULL_RTX if the operation + is not supported. */ + +rtx +emit_conditional_add (target, code, op0, op1, cmode, op2, op3, mode, + unsignedp) + rtx target; + enum rtx_code code; + rtx op0, op1; + enum machine_mode cmode; + rtx op2, op3; + enum machine_mode mode; + int unsignedp; +{ + rtx tem, subtarget, comparison, insn; + enum insn_code icode; + enum rtx_code reversed; + + /* If one operand is constant, make it the second one. Only do this + if the other operand is not constant as well. */ + + if (swap_commutative_operands_p (op0, op1)) + { + tem = op0; + op0 = op1; + op1 = tem; + code = swap_condition (code); + } + + /* get_condition will prefer to generate LT and GT even if the old + comparison was against zero, so undo that canonicalization here since + comparisons against zero are cheaper. */ + if (code == LT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == 1) + code = LE, op1 = const0_rtx; + else if (code == GT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == -1) + code = GE, op1 = const0_rtx; + + if (cmode == VOIDmode) + cmode = GET_MODE (op0); + + if (swap_commutative_operands_p (op2, op3) + && ((reversed = reversed_comparison_code_parts (code, op0, op1, NULL)) + != UNKNOWN)) + { + tem = op2; + op2 = op3; + op3 = tem; + code = reversed; + } + + if (mode == VOIDmode) + mode = GET_MODE (op2); + + icode = addcc_optab->handlers[(int) mode].insn_code; + + if (icode == CODE_FOR_nothing) + return 0; + + if (flag_force_mem) + { + op2 = force_not_mem (op2); + op3 = force_not_mem (op3); + } + + if (target) + target = protect_from_queue (target, 1); + else + target = gen_reg_rtx (mode); + + subtarget = target; + + emit_queue (); + + op2 = protect_from_queue (op2, 0); + op3 = protect_from_queue (op3, 0); + + /* If the insn doesn't accept these operands, put them in pseudos. */ + + if (! (*insn_data[icode].operand[0].predicate) + (subtarget, insn_data[icode].operand[0].mode)) + subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode); + + if (! (*insn_data[icode].operand[2].predicate) + (op2, insn_data[icode].operand[2].mode)) + op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2); + + if (! (*insn_data[icode].operand[3].predicate) + (op3, insn_data[icode].operand[3].mode)) + op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3); + + /* Everything should now be in the suitable form, so emit the compare insn + and then the conditional move. */ + + comparison + = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX); + + /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */ + /* We can get const0_rtx or const_true_rtx in some circumstances. Just + return NULL and let the caller figure out how best to deal with this + situation. */ + if (GET_CODE (comparison) != code) + return NULL_RTX; + + insn = GEN_FCN (icode) (subtarget, comparison, op2, op3); + + /* If that failed, then give up. */ + if (insn == 0) + return 0; + + emit_insn (insn); + + if (subtarget != target) + convert_move (target, subtarget, 0); + + return target; +} /* These functions generate an insn body and return it rather than emitting the insn. @@ -5229,6 +5357,7 @@ init_optabs () negv_optab = init_optabv (NEG); abs_optab = init_optab (ABS); absv_optab = init_optabv (ABS); + addcc_optab = init_optab (UNKNOWN); one_cmpl_optab = init_optab (NOT); ffs_optab = init_optab (FFS); sqrt_optab = init_optab (SQRT); |