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author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1997-09-09 22:21:04 +0000 |
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committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1997-09-09 22:21:04 +0000 |
commit | 6dac5483bb1d63245864f0d90c49820730a772b1 (patch) | |
tree | 71fefd9a0a4f91412d2e9ca1538cff6cb95ea5d8 /gcc/longlong.h | |
parent | c517e9be9b6b1821461fe566d9fcfb327f769199 (diff) | |
download | gcc-6dac5483bb1d63245864f0d90c49820730a772b1.tar.gz |
Add port done awhile ago for the ARC cpu.
* arc/arc.h: New file.
* arc/arc.c: New file.
* arc/arc.md: New file.
* arc/initfini.c: New file.
* arc/lib1funcs.asm: New file.
* arc/t-arc: New file.
* arc/xm-arc.h: New file.
* ginclude/va-arc.h: New file.
* ginclude/stdarg.h: Include va-arc.h ifdef __arc__.
* ginclude/varargs.h: Likewise.
* Makefile.in (USER_H): Add va-arc.h.
* configure.in (arc-*-elf*): Recognize.
* longlong.h: Add ARC support.
Mostly so I can test changes in snapshot scripts.
* expr.c (clear_storage): Use CONST0_RTX instead of const0_rtx.
when clearing non-BLKmode data.
Fixes sparc problem.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@15198 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/longlong.h')
-rw-r--r-- | gcc/longlong.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/gcc/longlong.h b/gcc/longlong.h index e6071547ad7..d9055c2a177 100644 --- a/gcc/longlong.h +++ b/gcc/longlong.h @@ -131,6 +131,37 @@ : "r" ((USItype) (x))) #endif /* __a29k__ */ +#if defined (__arc__) +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("add.f %1, %4, %5 + adc %0, %2, %3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "%r" ((USItype) (ah)), \ + "rIJ" ((USItype) (bh)), \ + "%r" ((USItype) (al)), \ + "rIJ" ((USItype) (bl))) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + __asm__ ("sub.f %1, %4, %5 + sbc %0, %2, %3" \ + : "=r" ((USItype) (sh)), \ + "=&r" ((USItype) (sl)) \ + : "r" ((USItype) (ah)), \ + "rIJ" ((USItype) (bh)), \ + "r" ((USItype) (al)), \ + "rIJ" ((USItype) (bl))) +/* Call libgcc1 routine. */ +#define umul_ppmm(w1, w0, u, v) \ +do { \ + DIunion __w; \ + __w.ll = __umulsidi3 (u, v); \ + w1 = __w.s.high; \ + w0 = __w.s.low; \ +} while (0) +#define __umulsidi3 __umulsidi3 +UDItype __umulsidi3 (USItype, USItype); +#endif + #if defined (__arm__) #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ __asm__ ("adds %1, %4, %5 |