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authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2003-10-24 09:25:30 +0000
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2003-10-24 09:25:30 +0000
commitaeac46d4895e26ae7c0fb8976229512eaa26a922 (patch)
tree8b0705d0530966a28b9e785abe61611f6dc2697b /gcc/java/except.c
parent97f876b9f0577976cd81574dc3d13df7152a9c32 (diff)
downloadgcc-aeac46d4895e26ae7c0fb8976229512eaa26a922.tar.gz
* arm.c (arm_rtx_costs_1, case TARGET_THUMB): Adjust costs for
comparing a constant with small negative numbers and add costing for constants in conjunction with AND. (note_invalid_constants): Tidy previous change. (thumb_cmp_operand): Tidy. (thumb_cmpneg_operand): New function. * arm.h (CONDITIONAL_REGISTER_USAGE): Don't use HI regs if optimizing for size. (FIRST_LO_REGNUM, FIRST_HI_REGNUM, LAST_HI_REGNUM): Define. (PREDICATE_CODES): Add thumb_cmpneg_operand. * arm.md (cbranchsi4): Convert to define_expand. Handle comparison with a negative constant. (cbranchsi4_insn): Matcher for cbranchsi4. (cbranchsi4_scratch): Similar, but a scratch is available for handling negative constants. (movsi_cbranchsi4): New pattern. (tstsi3_cbranch): Renamed from andsi3_cbranch_scratch, remove scratch and use the TST instruction. (andsi3_cbranch, orrsi3_cbranch, xorsi3_cbranch, cbranchne_decr1) (addsi3_cbranch, subsi3_cbranch): Ensure that register preferencing cannot see high regs or memory alternatives. (bicsi3_cbranch_scratch, bicsi3_cbranch): New patterns. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@72885 138bc75d-0d04-0410-961f-82ee72b054a4
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