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| author | mrs <mrs@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-04-10 18:46:45 +0000 |
|---|---|---|
| committer | mrs <mrs@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-04-10 18:46:45 +0000 |
| commit | 851d929653778531dd174c25c55d6c6558b5510f (patch) | |
| tree | bf95262adeb1e48387900226345da1050170321b /gcc/ira-int.h | |
| parent | 19bff7fe624209f0ffe8d6cac8a7a735e9c507f5 (diff) | |
| download | gcc-851d929653778531dd174c25c55d6c6558b5510f.tar.gz | |
Remove doubled up words.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@172247 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/ira-int.h')
| -rw-r--r-- | gcc/ira-int.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/ira-int.h b/gcc/ira-int.h index 9ea8041079e..ed7ffe5852f 100644 --- a/gcc/ira-int.h +++ b/gcc/ira-int.h @@ -805,7 +805,7 @@ struct target_ira_int { int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES]; /* Array of the number of hard registers of given class which are - available for allocation. The order is defined by the the hard + available for allocation. The order is defined by the hard register numbers. */ short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; |