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authormmitchel <mmitchel@138bc75d-0d04-0410-961f-82ee72b054a4>1999-05-26 09:38:33 +0000
committermmitchel <mmitchel@138bc75d-0d04-0410-961f-82ee72b054a4>1999-05-26 09:38:33 +0000
commitebfc0cc62480c089a23c4242ae18afc0bc787380 (patch)
tree806352f5e68f4ec08bbf248aadd9ec6eab580b26 /gcc/gcc.texi
parent869973e1c2b2f127e1993f71cfd08f88278a35f0 (diff)
downloadgcc-ebfc0cc62480c089a23c4242ae18afc0bc787380.tar.gz
* gcc.texi (Passes): Document branch-shortening.
* invoke.texi (Debugging Options): Document the fact that `-dp' outputs length information for instructions. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@27167 138bc75d-0d04-0410-961f-82ee72b054a4
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diff --git a/gcc/gcc.texi b/gcc/gcc.texi
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--- a/gcc/gcc.texi
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@@ -3563,6 +3563,15 @@ The option @samp{-dd} causes a debugging dump of the RTL code after
this pass. This dump file's name is made by appending @samp{.dbr}
to the input file name.
+@cindex branch shortening
+@item
+Branch shortening. On many RISC machines, branch instructions have a
+limited range. Thus, longer sequences of instructions must be used for
+long branches. In this pass, the compiler figures out what how far each
+instruction will be from each other instruction, and therefore whether
+the usual instructions, or the longer sequences, must be used for each
+branch.
+
@cindex register-to-stack conversion
@item
Conversion from usage of some hard registers to usage of a register