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authorsayle <sayle@138bc75d-0d04-0410-961f-82ee72b054a4>2004-12-18 14:38:44 +0000
committersayle <sayle@138bc75d-0d04-0410-961f-82ee72b054a4>2004-12-18 14:38:44 +0000
commit93d9d66fe4e9520042690f6c86bd18b0d88f9568 (patch)
tree776e691726aa4aa33b620c01f8751ea3f6edd1ca /gcc/expr.c
parenta287ef4f965e7c4214096571f10b4c00f57801ed (diff)
downloadgcc-93d9d66fe4e9520042690f6c86bd18b0d88f9568.tar.gz
PR middle-end/18548
* expr.c (expand_expr_real_1) <MAX_EXPR>: Ensure that target, op0 and op1 are all registers (or constants) before expanding the RTL comparison sequence [to avoid reg_overlap_mentioned (target, op1)]. * gcc.dg/max-1.c: New test case. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@92351 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/expr.c')
-rw-r--r--gcc/expr.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/expr.c b/gcc/expr.c
index fffb60d003b..2581c150dba 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -7671,7 +7671,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
/* At this point, a MEM target is no longer useful; we will get better
code without it. */
- if (MEM_P (target))
+ if (! REG_P (target))
target = gen_reg_rtx (mode);
/* If op1 was placed in target, swap op0 and op1. */
@@ -7682,6 +7682,11 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
op1 = tem;
}
+ /* We generate better code and avoid problems with op1 mentioning
+ target by forcing op1 into a pseudo if it isn't a constant. */
+ if (! CONSTANT_P (op1))
+ op1 = force_reg (mode, op1);
+
if (target != op0)
emit_move_insn (target, op0);