2001-10-10 Stan Shebs <shebs@apple.com>

        * alias.c: Remove uses of "register" specifier in declarations
        of arguments and local variables.
        * c-common.c: Ditto.
        * c-convert.c: Ditto.
        * c-decl.c: Ditto.
        * c-format.c: Ditto.
        * c-semantics.c: Ditto.
        * c-typeck.c: Ditto.
        * caller-save.c: Ditto.
        * calls.c: Ditto.
        * cfg.c: Ditto.
        * cfgbuild.c: Ditto.
        * cfgrtl.c: Ditto.
        * collect2.c: Ditto.
        * combine.c: Ditto.
        * convert.c: Ditto.
        * cppexp.c: Ditto.
        * cppfiles.c: Ditto.
        * cse.c: Ditto.
        * dbxout.c: Ditto.
        * defaults.h: Ditto.
        * df.c: Ditto.
        * dwarf2out.c: Ditto.
        * dwarfout.c: Ditto.
        * emit-rtl.c: Ditto.
        * explow.c: Ditto.
        * expmed.c: Ditto.
        * expr.c: Ditto.
        * final.c: Ditto.
        * fix-header.c: Ditto.
        * floatlib.c: Ditto.
        * flow.c: Ditto.
        * fold-const.c: Ditto.
        * function.c: Ditto.
        * gcc.c: Ditto.
        * gcse.c: Ditto.
        * gen-protos.c: Ditto.
        * genattrtab.c: Ditto.
        * gencheck.c: Ditto.
        * genconfig.c: Ditto.
        * genemit.c: Ditto.
        * genextract.c: Ditto.
        * genflags.c: Ditto.
        * gengenrtl.c: Ditto.
        * genoutput.c: Ditto.
        * genpeep.c: Ditto.
        * genrecog.c: Ditto.
        * gensupport.c: Ditto.
        * global.c: Ditto.
        * gmon.c: Ditto.
        * graph.c: Ditto.
        * haifa-sched.c: Ditto.
        * hard-reg-set.h: Ditto.
        * hash.c: Ditto.
        * integrate.c: Ditto.
        * jump.c: Ditto.
        * lists.c: Ditto.
        * local-alloc.c: Ditto.
        * loop.c: Ditto.
        * mips-tdump.c: Ditto.
        * mips-tfile.c: Ditto.
        * optabs.c: Ditto.
        * prefix.c: Ditto.
        * print-rtl.c: Ditto.
        * read-rtl.c: Ditto.
        * real.c: Ditto.
        * recog.c: Ditto.
        * reg-stack.c: Ditto.
        * regclass.c: Ditto.
        * regmove.c: Ditto.
        * reload.c: Ditto.
        * reload1.c: Ditto.
        * reorg.c: Ditto.
        * resource.c: Ditto.
        * rtl.c: Ditto.
        * rtlanal.c: Ditto.
        * scan.c: Ditto.
        * sched-deps.c: Ditto.
        * sched-rgn.c: Ditto.
        * sdbout.c: Ditto.
        * simplify-rtx.c: Ditto.
        * stmt.c: Ditto.
        * stor-layout.c: Ditto.
        * toplev.c: Ditto.
        * tradcif.y: Ditto.
        * tradcpp.c: Ditto.
        * tree.c: Ditto.
        * unroll.c: Ditto.
        * varasm.c: Ditto.
        * xcoffout.c: Ditto.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@46173 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 17 insertions, 17 deletions

diff --git a/gcc/expmed.c b/gcc/expmed.c
index f7f3728fd2e..b08a8c60c46 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -302,7 +302,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
     = (GET_CODE (str_rtx) == MEM) ? BITS_PER_UNIT : BITS_PER_WORD;
   unsigned HOST_WIDE_INT offset = bitnum / unit;
   unsigned HOST_WIDE_INT bitpos = bitnum % unit;
-  register rtx op0 = str_rtx;
+  rtx op0 = str_rtx;
 
   enum machine_mode op_mode = mode_for_extraction (EP_insv, 3);
 
@@ -693,12 +693,12 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
 
 static void
 store_fixed_bit_field (op0, offset, bitsize, bitpos, value, struct_align)
-     register rtx op0;
+     rtx op0;
      unsigned HOST_WIDE_INT offset, bitsize, bitpos;
-     register rtx value;
+     rtx value;
      unsigned int struct_align;
 {
-  register enum machine_mode mode;
+  enum machine_mode mode;
   unsigned int total_bits = BITS_PER_WORD;
   rtx subtarget, temp;
   int all_zero = 0;
@@ -794,7 +794,7 @@ store_fixed_bit_field (op0, offset, bitsize, bitpos, value, struct_align)
 
   if (GET_CODE (value) == CONST_INT)
     {
-      register HOST_WIDE_INT v = INTVAL (value);
+      HOST_WIDE_INT v = INTVAL (value);
 
       if (bitsize < HOST_BITS_PER_WIDE_INT)
 	v &= ((HOST_WIDE_INT) 1 << bitsize) - 1;
@@ -1033,7 +1033,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
     = (GET_CODE (str_rtx) == MEM) ? BITS_PER_UNIT : BITS_PER_WORD;
   unsigned HOST_WIDE_INT offset = bitnum / unit;
   unsigned HOST_WIDE_INT bitpos = bitnum % unit;
-  register rtx op0 = str_rtx;
+  rtx op0 = str_rtx;
   rtx spec_target = target;
   rtx spec_target_subreg = 0;
   enum machine_mode int_mode;
@@ -1577,7 +1577,7 @@ static rtx
 extract_fixed_bit_field (tmode, op0, offset, bitsize, bitpos,
 			 target, unsignedp, align)
      enum machine_mode tmode;
-     register rtx op0, target;
+     rtx op0, target;
      unsigned HOST_WIDE_INT offset, bitsize, bitpos;
      int unsignedp;
      unsigned int align;
@@ -1931,15 +1931,15 @@ expand_dec (target, dec)
 rtx
 expand_shift (code, mode, shifted, amount, target, unsignedp)
      enum tree_code code;
-     register enum machine_mode mode;
+     enum machine_mode mode;
      rtx shifted;
      tree amount;
-     register rtx target;
+     rtx target;
      int unsignedp;
 {
-  register rtx op1, temp = 0;
-  register int left = (code == LSHIFT_EXPR || code == LROTATE_EXPR);
-  register int rotate = (code == LROTATE_EXPR || code == RROTATE_EXPR);
+  rtx op1, temp = 0;
+  int left = (code == LSHIFT_EXPR || code == LROTATE_EXPR);
+  int rotate = (code == LROTATE_EXPR || code == RROTATE_EXPR);
   int try;
 
   /* Previously detected shift-counts computed by NEGATE_EXPR
@@ -2371,7 +2371,7 @@ synth_mult (alg_out, t, cost_limit)
 rtx
 expand_mult (mode, op0, op1, target, unsignedp)
      enum machine_mode mode;
-     register rtx op0, op1, target;
+     rtx op0, op1, target;
      int unsignedp;
 {
   rtx const_op1 = op1;
@@ -2757,7 +2757,7 @@ invert_mod2n (x, n)
 rtx
 expand_mult_highpart_adjust (mode, adj_operand, op0, op1, target, unsignedp)
      enum machine_mode mode;
-     register rtx adj_operand, op0, op1, target;
+     rtx adj_operand, op0, op1, target;
      int unsignedp;
 {
   rtx tem;
@@ -2794,7 +2794,7 @@ expand_mult_highpart_adjust (mode, adj_operand, op0, op1, target, unsignedp)
 rtx
 expand_mult_highpart (mode, op0, cnst1, target, unsignedp, max_cost)
      enum machine_mode mode;
-     register rtx op0, target;
+     rtx op0, target;
      unsigned HOST_WIDE_INT cnst1;
      int unsignedp;
      int max_cost;
@@ -2976,11 +2976,11 @@ expand_divmod (rem_flag, code, mode, op0, op1, target, unsignedp)
      int rem_flag;
      enum tree_code code;
      enum machine_mode mode;
-     register rtx op0, op1, target;
+     rtx op0, op1, target;
      int unsignedp;
 {
   enum machine_mode compute_mode;
-  register rtx tquotient;
+  rtx tquotient;
   rtx quotient = 0, remainder = 0;
   rtx last;
   int size;