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author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-12-01 17:49:20 +0000 |
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committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-12-01 17:49:20 +0000 |
commit | a626814e2473c45b7042da9b9e4293951ce2171f (patch) | |
tree | b0d33250e1630b94029b3d702918f400c955690e /gcc/expmed.c | |
parent | a4d9a808b72beb054553cfb8419b9713302c1ae1 (diff) | |
download | gcc-a626814e2473c45b7042da9b9e4293951ce2171f.tar.gz |
* expmed.c (store_bit_field): Use simplify_gen_subreg instead
of gen_rtx_SUBREG directly.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@91569 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/expmed.c')
-rw-r--r-- | gcc/expmed.c | 18 |
1 files changed, 4 insertions, 14 deletions
diff --git a/gcc/expmed.c b/gcc/expmed.c index 37d6768b266..fe0db062b56 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -431,21 +431,11 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, { if (GET_MODE (op0) != fieldmode) { - if (GET_CODE (op0) == SUBREG) - { - /* Else we've got some float mode source being extracted - into a different float mode destination -- this - combination of subregs results in Severe Tire - Damage. */ - gcc_assert (GET_MODE (SUBREG_REG (op0)) == fieldmode - || GET_MODE_CLASS (fieldmode) == MODE_INT - || GET_MODE_CLASS (fieldmode) == MODE_PARTIAL_INT); - op0 = SUBREG_REG (op0); - } - if (REG_P (op0)) - op0 = gen_rtx_SUBREG (fieldmode, op0, byte_offset); - else + if (MEM_P (op0)) op0 = adjust_address (op0, fieldmode, offset); + else + op0 = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0), + byte_offset); } emit_move_insn (op0, value); return value; |