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author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-12-20 12:51:22 +0000 |
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committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-12-20 12:51:22 +0000 |
commit | bd39703a4678d7f3334659999c87f356f5cfb2d1 (patch) | |
tree | 87a4afd30dc1d59b47bcd99fe6310f168476084b /gcc/emit-rtl.c | |
parent | 9a0a7299115b5bd147f073c31bd6604d2cbe9c83 (diff) | |
download | gcc-bd39703a4678d7f3334659999c87f356f5cfb2d1.tar.gz |
Add a gen_int_shift_amount helper function
This patch adds a helper routine that constructs rtxes
for constant shift amounts, given the mode of the value
being shifted. As well as helping with the SVE patches, this
is one step towards allowing CONST_INTs to have a real mode.
One long-standing problem has been to decide what the mode
of a shift count should be for arbitrary rtxes (as opposed to those
directly tied to a target pattern). Realistic choices would be
the mode of the shifted elements, word_mode, QImode, a 64-bit mode,
or the same mode as the shift optabs (in which case what should the
mode be when the target doesn't have a pattern?)
For now the patch picks a 64-bit mode, but with a ??? comment.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* emit-rtl.h (gen_int_shift_amount): Declare.
* emit-rtl.c (gen_int_shift_amount): New function.
* asan.c (asan_emit_stack_protection): Use gen_int_shift_amount
instead of GEN_INT.
* calls.c (shift_return_value): Likewise.
* cse.c (fold_rtx): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (init_expmed_one_mode, store_bit_field_1, expand_shift_1)
(expand_shift, expand_smod_pow2): Likewise.
* lower-subreg.c (shift_cost): Likewise.
* optabs.c (expand_superword_shift, expand_doubleword_mult)
(expand_unop, expand_binop, shift_amt_for_vec_perm_mask)
(expand_vec_perm_var): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
* combine.c (try_combine, find_split_point, force_int_to_mode)
(simplify_shift_const_1, simplify_shift_const): Likewise.
(change_zero_ext): Likewise. Use simplify_gen_binary.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@255861 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/emit-rtl.c')
-rw-r--r-- | gcc/emit-rtl.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index 9ba2a930b67..8dab3308cda 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -6418,6 +6418,22 @@ need_atomic_barrier_p (enum memmodel model, bool pre) } } +/* Return a constant shift amount for shifting a value of mode MODE + by VALUE bits. */ + +rtx +gen_int_shift_amount (machine_mode, HOST_WIDE_INT value) +{ + /* Use a 64-bit mode, to avoid any truncation. + + ??? Perhaps this should be automatically derived from the .md files + instead, or perhaps have a target hook. */ + scalar_int_mode shift_mode = (BITS_PER_UNIT == 8 + ? DImode + : int_mode_for_size (64, 0).require ()); + return gen_int_mode (value, shift_mode); +} + /* Initialize fields of rtl_data related to stack alignment. */ void |