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authorbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2005-07-12 10:38:45 +0000
committerbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2005-07-12 10:38:45 +0000
commit88a2642532a9c391d71c86b3842acf09b6f6c2c6 (patch)
tree76db931bacde75fdd72ea59e5348e49db551f380 /gcc/doc
parent6ac5504b880a3ab0799b38230a367d4ce46dc031 (diff)
downloadgcc-88a2642532a9c391d71c86b3842acf09b6f6c2c6.tar.gz
* doc/extend.texi (Blackfin Built-in Functions): New section.
* doc/invoke.texi (mcsync-anomaly, mno-csync-anomaly): Fix the @opindex. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@101919 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/extend.texi15
-rw-r--r--gcc/doc/invoke.texi4
2 files changed, 17 insertions, 2 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index b019d388219..cc6ea2de053 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -5766,6 +5766,7 @@ instructions, but allow the compiler to schedule those calls.
@menu
* Alpha Built-in Functions::
* ARM Built-in Functions::
+* Blackfin Built-in Functions::
* FR-V Built-in Functions::
* X86 Built-in Functions::
* MIPS Paired-Single Support::
@@ -6002,6 +6003,20 @@ long long __builtin_arm_wxor (long long, long long)
long long __builtin_arm_wzero ()
@end smallexample
+@node Blackfin Built-in Functions
+@subsection Blackfin Built-in Functions
+
+Currently, there are two Blackfin-specific built-in functions. These are
+used for generating @code{CSYNC} and @code{SSYNC} machine insns without
+using inline assembly; by using these built-in functions the compiler can
+automatically add workarounds for hardware errata involving these
+instructions. These functions are named as follows:
+
+@smallexample
+void __builtin_bfin_csync (void)
+void __builtin_bfin_ssync (void)
+@end smallexample
+
@node FR-V Built-in Functions
@subsection FR-V Built-in Functions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 8fa98600472..0f509d0ce7b 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -7415,13 +7415,13 @@ by default.
Don't generate extra code to prevent speculative loads from occurring.
@item -mcsync-anomaly
-@opindex mspecld-anomaly
+@opindex mcsync-anomaly
When enabled, the compiler will ensure that the generated code does not
contain CSYNC or SSYNC instructions too soon after conditional branches.
This option is enabled by default.
@item -mno-csync-anomaly
-@opindex mno-specld-anomaly
+@opindex mno-csync-anomaly
Don't generate extra code to prevent CSYNC or SSYNC instructions from
occurring too soon after a conditional branch.