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| author | vekumar <vekumar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-03-01 09:57:59 +0000 |
|---|---|---|
| committer | vekumar <vekumar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-03-01 09:57:59 +0000 |
| commit | fb7c1017e778b8fb2d6bf2e486a2ecddf8ffc3d3 (patch) | |
| tree | cf2c20e9a82d7a14ca748e1a988a883b5ff4d392 /gcc/doc | |
| parent | 19b4f09b9380c00368ec780aa3e39c77dafcc373 (diff) | |
| download | gcc-fb7c1017e778b8fb2d6bf2e486a2ecddf8ffc3d3.tar.gz | |
Document AMD bdver2 in invoke.texi
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184688 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/invoke.texi | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e57f586fe22..b806eb4670f 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -13084,8 +13084,12 @@ instruction set extensions.) @item bdver1 AMD Family 15h core based CPUs with x86-64 instruction set support. (This supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, -SSSE3, SSE4.1, SSE4.2, 3DNow!, enhanced 3DNow!, ABM and 64-bit -instruction set extensions.) +SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.) +@item bdver2 +AMD Family 15h core based CPUs with x86-64 instruction set support. (This +supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, +SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set +extensions.) @item btver1 AMD Family 14h core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and 64-bit |