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author | jiwang <jiwang@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-19 13:59:56 +0000 |
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committer | jiwang <jiwang@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-19 13:59:56 +0000 |
commit | dad0993e9067ba38d900b36f039a7c7d5c055ce8 (patch) | |
tree | 40411588caf22f22a87c45f55d64e7352997b459 /gcc/doc | |
parent | be3315261c6403549c63b1575a834ba33cc0c3b7 (diff) | |
download | gcc-dad0993e9067ba38d900b36f039a7c7d5c055ce8.tar.gz |
[Patch 1/4] Simplify the representation of CCMP patterns by using
2015-01-19 Wilco Dijkstra <wdijkstr@arm.com>
gcc/
* target.def (gen_ccmp_first): Update documentation.
(gen_ccmp_next): Likewise.
* doc/tm.texi (gen_ccmp_first): Update documentation.
(gen_ccmp_next): Likewise.
* ccmp.c (expand_ccmp_expr): Extract cmp_code from return value of
expand_ccmp_expr_1. Improve comments.
* config/aarch64/aarch64.md (ccmp_and): Use if_then_else for ccmp.
(ccmp_ior<mode>): Remove pattern.
(cmp<mode>): Remove expand.
(cmp): Globalize pattern.
(cstorecc4): Use cc_register.
(mov<mode>cc): Remove ccmp_cc_register check.
* config/aarch64/aarch64.c (aarch64_get_condition_code_1):
Simplify after removal of CC_DNE/* modes.
(aarch64_ccmp_mode_to_code): Remove.
(aarch64_print_operand): Remove 'K' case. Merge 'm' and 'M' cases.
In 'k' case use integer as condition.
(aarch64_nzcv_codes): Remove inverted cases.
(aarch64_code_to_ccmode): Remove.
(aarch64_gen_ccmp_first): Use cmp pattern directly. Return the correct
comparison with CC register to be used in folowing CCMP/branch/CSEL.
(aarch64_gen_ccmp_next): Use previous comparison and mode in CCMP
pattern. Return the comparison with CC register. Invert conditions
when bitcode is OR.
* config/aarch64/aarch64-modes.def: Remove CC_DNE/* modes.
* config/aarch64/predicates.md (ccmp_cc_register): Remove.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232561 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/tm.texi | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 7a11552408d..aae09bfc82f 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -11370,27 +11370,27 @@ modes and they have different conditional execution capability, such as ARM. @deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (rtx *@var{prep_seq}, rtx *@var{gen_seq}, int @var{code}, tree @var{op0}, tree @var{op1}) This function prepares to emit a comparison insn for the first compare in a - sequence of conditional comparisions. It returns a appropriate @code{CC} - for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. The insns to - prepare the compare are saved in @var{prep_seq} and the compare insns are - saved in @var{gen_seq}. They will be emitted when all the compares in the - the conditional comparision are generated without error. @var{code} is - the @code{rtx_code} of the compare for @var{op0} and @var{op1}. + sequence of conditional comparisions. It returns an appropriate comparison + with @code{CC} for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. + The insns to prepare the compare are saved in @var{prep_seq} and the compare + insns are saved in @var{gen_seq}. They will be emitted when all the + compares in the the conditional comparision are generated without error. + @var{code} is the @code{rtx_code} of the compare for @var{op0} and @var{op1}. @end deftypefn @deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx *@var{prep_seq}, rtx *@var{gen_seq}, rtx @var{prev}, int @var{cmp_code}, tree @var{op0}, tree @var{op1}, int @var{bit_code}) -This function prepare to emit a conditional comparison within a sequence of - conditional comparisons. It returns a appropriate @code{CC} for passing to - @code{gen_ccmp_next} or @code{cbranch_optab}. The insns to prepare the - compare are saved in @var{prep_seq} and the compare insns are saved in - @var{gen_seq}. They will be emitted when all the compares in the conditional - comparision are generated without error. The @var{prev} expression is the - result of a prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It - may return @code{NULL} if the combination of @var{prev} and this comparison is - not supported, otherwise the result must be appropriate for passing to - @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is the - @code{rtx_code} of the compare for @var{op0} and @var{op1}. @var{bit_code} - is @code{AND} or @code{IOR}, which is the op on the two compares. +This function prepares to emit a conditional comparison within a sequence + of conditional comparisons. It returns an appropriate comparison with + @code{CC} for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. + The insns to prepare the compare are saved in @var{prep_seq} and the compare + insns are saved in @var{gen_seq}. They will be emitted when all the + compares in the conditional comparision are generated without error. The + @var{prev} expression is the result of a prior call to @code{gen_ccmp_first} + or @code{gen_ccmp_next}. It may return @code{NULL} if the combination of + @var{prev} and this comparison is not supported, otherwise the result must + be appropriate for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. + @var{code} is the @code{rtx_code} of the compare for @var{op0} and @var{op1}. + @var{bit_code} is @code{AND} or @code{IOR}, which is the op on the compares. @end deftypefn @deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @var{nunroll}, struct loop *@var{loop}) |