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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2016-02-04 15:01:15 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2016-02-04 15:01:15 +0000
commita6f3f39ff6a1954b40ce049cf100e0756c58489f (patch)
treea9aa9dd6694766c5a4db3eb12026c67801b1456e /gcc/doc
parentda08cb5504f0b791ada8889b16620055672999b8 (diff)
downloadgcc-a6f3f39ff6a1954b40ce049cf100e0756c58489f.tar.gz
PR 69577: Invalid RA of destination subregs
In PR 69577 we have: A: (set (reg:V2TI X) ...) B: (set (subreg:TI (reg:V2TI X) 0) ...) X gets allocated to an AVX register, as usual for V2TI. The problem is that the movti for B doesn't then preserve the other half of X, even though the subreg semantics are supposed to guarantee that. If instead the same value had been set by: A': (set (subreg:TI (reg:V2TI X) 16) ...) B: (set (subreg:TI (reg:V2TI X) 0) ...) the subreg in A' would have prevented the use of AVX registers for X, since you can't directly access the high part. IMO these are really the same thing. An alternative way to view it is that the original sequence is equivalent to: A: (set (reg:V2TI X) ...) B1: (set (subreg:TI (reg:V2TI X) 0) ...) B2: (set (subreg:TI (reg:V2TI X) 16) (subreg:TI (reg:V2TI X) 16)) in which B2 is a no-op and therefore implicit. The handling ought to be the same regardless of whether there is an rtl insn that explicitly assigns to (subreg:TI (reg:V2TI X) 16). This patch implements that idea. Hopefully the comments explain what's going on. Tested on x86_64-linux-gnu, aarch64-linux-gnu and arm-linux-gnueabihf. gcc/ PR rtl-optimization/69577 * reginfo.c (record_subregs_of_mode): Add a partial_def parameter. (find_subregs_of_mode): Update accordingly. Iterate over partial definitions. gcc/testsuite/ PR rtl-optimization/69577 * gcc.target/i386/pr69577.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@233143 138bc75d-0d04-0410-961f-82ee72b054a4
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