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authorclaziss <claziss@138bc75d-0d04-0410-961f-82ee72b054a4>2016-01-25 11:15:58 +0000
committerclaziss <claziss@138bc75d-0d04-0410-961f-82ee72b054a4>2016-01-25 11:15:58 +0000
commit7ce15a25e13f6fea156c366e813e156bff917b14 (patch)
treea518e7e353c9e58626c676f4a558352d9ee4df96 /gcc/doc
parentf34cae5b3e267951ba3ade328bf4dcd0e4d3e628 (diff)
downloadgcc-7ce15a25e13f6fea156c366e813e156bff917b14.tar.gz
[ARC] Add basic support for double load and store instructions
gcc/ 2016-01-25 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.c (TARGET_DWARF_REGISTER_SPAN): Define. (arc_init): Check validity mll64 option. (arc_save_restore): Use double load/store instruction. (arc_expand_movmem): Likewise. (arc_split_move): Don't split if we have double load/store instructions. Returns a boolean. (arc_process_double_reg_moves): Change function to return boolean instead of a sequence of instructions. (arc_dwarf_register_span): New function. * config/arc/arc-protos.h (arc_split_move): Change prototype. * config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Define __ARC_LL64__. * config/arc/arc.md (*movdi_insn): Emit ldd/std instructions. (*movdf_insn): Likewise. * config/arc/arc.opt (mll64): New option. * config/arc/predicates.md (even_register_operand): New predicate. * doc/invoke.texi (ARC Options): Add mll64 documentation. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@232788 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/invoke.texi6
1 files changed, 5 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d2819753de2..ba0b4b2cd56 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -599,7 +599,7 @@ Objective-C and Objective-C++ Dialects}.
-mmixed-code -mq-class -mRcq -mRcw -msize-level=@var{level} @gol
-mtune=@var{cpu} -mmultcost=@var{num} @gol
-munalign-prob-threshold=@var{probability} -mmpy-option=@var{multo} @gol
--mdiv-rem -mcode-density}
+-mdiv-rem -mcode-density -mll64}
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
@@ -13259,6 +13259,10 @@ Enable DIV/REM instructions for ARCv2 cores.
@opindex mcode-density
Enable code density instructions for ARC EM, default on for ARC HS.
+@item -mll64
+@opindex mll64
+Enable double load/store operations for ARC HS cores.
+
@item -mmpy-option=@var{multo}
@opindex mmpy-option
Compile ARCv2 code with a multiplier design option. @samp{wlh1} is