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author | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-05-30 17:09:22 +0000 |
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committer | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-05-30 17:09:22 +0000 |
commit | 3bee6fefaa6f8a72363537442b3d8fa0428cf0ec (patch) | |
tree | 666a2af60f89f06624ac68ad048dd56ae29cd9ab /gcc/doc | |
parent | 393c81ebb6a54a220b64a3131701dfc29650bc6d (diff) | |
download | gcc-3bee6fefaa6f8a72363537442b3d8fa0428cf0ec.tar.gz |
[gcc]
2016-05-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2016-04-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.h: Change definitions of vec_xl and
vec_xst.
* config/rs6000/rs6000-builtin.def (LD_ELEMREV_V2DF): New.
(LD_ELEMREV_V2DI): New.
(LD_ELEMREV_V4SF): New.
(LD_ELEMREV_V4SI): New.
(LD_ELEMREV_V8HI): New.
(LD_ELEMREV_V16QI): New.
(ST_ELEMREV_V2DF): New.
(ST_ELEMREV_V2DI): New.
(ST_ELEMREV_V4SF): New.
(ST_ELEMREV_V4SI): New.
(ST_ELEMREV_V8HI): New.
(ST_ELEMREV_V16QI): New.
(XL): New.
(XST): New.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
descriptions for VSX_BUILTIN_VEC_XL and VSX_BUILTIN_VEC_XST.
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Map from
TARGET_P9_VECTOR to RS6000_BTM_P9_VECTOR.
(altivec_expand_builtin): Add handling for
VSX_BUILTIN_ST_ELEMREV_<MODE> and VSX_BUILTIN_LD_ELEMREV_<MODE>.
(rs6000_invalid_builtin): Add error-checking for
RS6000_BTM_P9_VECTOR.
(altivec_init_builtins): Define builtins used to implement vec_xl
and vec_xst.
(rs6000_builtin_mask_names): Define power9-vector.
* config/rs6000/rs6000.h (MASK_P9_VECTOR): Define.
(RS6000_BTM_P9_VECTOR): Define.
(RS6000_BTM_COMMON): Include RS6000_BTM_P9_VECTOR.
* config/rs6000/vsx.md (vsx_ld_elemrev_v2di): New define_insn.
(vsx_ld_elemrev_v2df): Likewise.
(vsx_ld_elemrev_v4sf): Likewise.
(vsx_ld_elemrev_v4si): Likewise.
(vsx_ld_elemrev_v8hi): Likewise.
(vsx_ld_elemrev_v16qi): Likewise.
(vsx_st_elemrev_v2df): Likewise.
(vsx_st_elemrev_v2di): Likewise.
(vsx_st_elemrev_v4sf): Likewise.
(vsx_st_elemrev_v4si): Likewise.
(vsx_st_elemrev_v8hi): Likewise.
(vsx_st_elemrev_v16qi): Likewise.
* doc/extend.texi: Add prototypes for vec_xl and vec_xst. Correct
grammar.
[gcc/testsuite]
2016-05-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2016-04-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-elemrev-1.c: New.
* gcc.target/powerpc/vsx-elemrev-2.c: New.
* gcc.target/powerpc/vsx-elemrev-3.c: New.
* gcc.target/powerpc/vsx-elemrev-4.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-6-branch@236890 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/extend.texi | 50 |
1 files changed, 48 insertions, 2 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index a5a8b23df27..dc2570fc565 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -15932,6 +15932,18 @@ void vec_st (vector double, int, vector double *); void vec_st (vector double, int, double *); vector double vec_sub (vector double, vector double); vector double vec_trunc (vector double); +vector double vec_xl (int, vector double *); +vector double vec_xl (int, double *); +vector long long vec_xl (int, vector long long *); +vector long long vec_xl (int, long long *); +vector unsigned long long vec_xl (int, vector unsigned long long *); +vector unsigned long long vec_xl (int, unsigned long long *); +vector float vec_xl (int, vector float *); +vector float vec_xl (int, float *); +vector int vec_xl (int, vector int *); +vector int vec_xl (int, int *); +vector unsigned int vec_xl (int, vector unsigned int *); +vector unsigned int vec_xl (int, unsigned int *); vector double vec_xor (vector double, vector double); vector double vec_xor (vector double, vector bool long); vector double vec_xor (vector bool long, vector double); @@ -15941,6 +15953,18 @@ vector long vec_xor (vector bool long, vector long); vector unsigned long vec_xor (vector unsigned long, vector unsigned long); vector unsigned long vec_xor (vector unsigned long, vector bool long); vector unsigned long vec_xor (vector bool long, vector unsigned long); +void vec_xst (vector double, int, vector double *); +void vec_xst (vector double, int, double *); +void vec_xst (vector long long, int, vector long long *); +void vec_xst (vector long long, int, long long *); +void vec_xst (vector unsigned long long, int, vector unsigned long long *); +void vec_xst (vector unsigned long long, int, unsigned long long *); +void vec_xst (vector float, int, vector float *); +void vec_xst (vector float, int, float *); +void vec_xst (vector int, int, vector int *); +void vec_xst (vector int, int, int *); +void vec_xst (vector unsigned int, int, vector unsigned int *); +void vec_xst (vector unsigned int, int, unsigned int *); int vec_all_eq (vector double, vector double); int vec_all_ge (vector double, vector double); int vec_all_gt (vector double, vector double); @@ -16055,7 +16079,7 @@ if the VSX instruction set is available. The @samp{vec_vsx_ld} and @samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions. If the ISA 2.07 additions to the vector/scalar (power8-vector) -instruction set is available, the following additional functions are +instruction set are available, the following additional functions are available for both 32-bit and 64-bit targets. For 64-bit targets, you can use @var{vector long} instead of @var{vector long long}, @var{vector bool long} instead of @var{vector bool long long}, and @@ -16368,7 +16392,7 @@ vector unsigned long long vec_vupklsw (vector int); @end smallexample If the ISA 2.07 additions to the vector/scalar (power8-vector) -instruction set is available, the following additional functions are +instruction set are available, the following additional functions are available for 64-bit targets. New vector types (@var{vector __int128_t} and @var{vector __uint128_t}) are available to hold the @var{__int128_t} and @var{__uint128_t} types to use these @@ -16483,6 +16507,28 @@ The second argument to the @var{__builtin_crypto_vshasigmad} and integer that is 0 or 1. The third argument to these builtin functions must be a constant integer in the range of 0 to 15. +If the ISA 3.00 additions to the vector/scalar (power9-vector) +instruction set are available, the following additional functions are +available for both 32-bit and 64-bit targets. + +vector short vec_xl (int, vector short *); +vector short vec_xl (int, short *); +vector unsigned short vec_xl (int, vector unsigned short *); +vector unsigned short vec_xl (int, unsigned short *); +vector char vec_xl (int, vector char *); +vector char vec_xl (int, char *); +vector unsigned char vec_xl (int, vector unsigned char *); +vector unsigned char vec_xl (int, unsigned char *); + +void vec_xst (vector short, int, vector short *); +void vec_xst (vector short, int, short *); +void vec_xst (vector unsigned short, int, vector unsigned short *); +void vec_xst (vector unsigned short, int, unsigned short *); +void vec_xst (vector char, int, vector char *); +void vec_xst (vector char, int, char *); +void vec_xst (vector unsigned char, int, vector unsigned char *); +void vec_xst (vector unsigned char, int, unsigned char *); + @node PowerPC Hardware Transactional Memory Built-in Functions @subsection PowerPC Hardware Transactional Memory Built-in Functions GCC provides two interfaces for accessing the Hardware Transactional |