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authordavem <davem@138bc75d-0d04-0410-961f-82ee72b054a4>2012-10-27 02:57:50 +0000
committerdavem <davem@138bc75d-0d04-0410-961f-82ee72b054a4>2012-10-27 02:57:50 +0000
commit26e072d34c8854b819a4f4baabea7698510f7f8a (patch)
tree215be93ecbd7f31f624e0cdcec97252fe1ed2aaa /gcc/doc
parentbcf5479945a794cae3a5570deb6468a72a37929f (diff)
downloadgcc-26e072d34c8854b819a4f4baabea7698510f7f8a.tar.gz
Update sparc constraint comments and documentation.
* config/sparc/constraints.md: Update unused letter list, move "w" near other memory constraints. Remove no longer relevant comment. * doc/md.texi: Sync sparc constraint documentation with reality. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@192871 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/md.texi18
1 files changed, 13 insertions, 5 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 88e1ca7c4f6..dfbdc4c2903 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3219,6 +3219,9 @@ when the Visual Instruction Set is available.
@item h
64-bit global or out register for the SPARC-V8+ architecture.
+@item C
+The constant all-ones, for floating-point.
+
@item D
A vector constant
@@ -3233,10 +3236,12 @@ Zero
loaded with the @code{sethi} instruction)
@item L
-A constant in the range supported by @code{movcc} instructions
+A constant in the range supported by @code{movcc} instructions (11-bit
+signed immediate)
@item M
-A constant in the range supported by @code{movrcc} instructions
+A constant in the range supported by @code{movrcc} instructions (10-bit
+signed immediate)
@item N
Same as @samp{K}, except that it verifies that bits that are not in the
@@ -3252,6 +3257,9 @@ Floating-point zero
@item H
Signed 13-bit constant, sign-extended to 32 or 64 bits
+@item P
+The constant -1
+
@item Q
Floating-point constant whose integral representation can
be moved into an integer register using a single sethi
@@ -3270,12 +3278,12 @@ instruction sequence
@item T
Memory address aligned to an 8-byte boundary
-@item U
-Even register
-
@item W
Memory address for @samp{e} constraint registers
+@item w
+Memory address with only a base register
+
@item Y
Vector zero