diff options
| author | rguenth <rguenth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-04-13 07:33:51 +0000 |
|---|---|---|
| committer | rguenth <rguenth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-04-13 07:33:51 +0000 |
| commit | 48b24f49220ac3967ecc94fd4099f1fbda238cfa (patch) | |
| tree | f0c8f64aec0b67411f4cef95a7e25582082dc6f6 /gcc/config | |
| parent | e7826ae1ecaff3c66be02d506913e6b2468e000d (diff) | |
| download | gcc-48b24f49220ac3967ecc94fd4099f1fbda238cfa.tar.gz | |
2015-04-13 Richard Biener <rguenther@suse.de>
PR target/65660
* config/i386/i386.c (bdver1_cost): Double cond_taken_branch_cost
and cond_not_taken_branch_cost to 4 and 2.
(bdver2_cost): Likewise.
(bdver3_cost): Likewise.
(bdver4_cost): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@222040 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index b442da9802e..3263656eef3 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1025,8 +1025,8 @@ const struct processor_costs bdver1_cost = { 4, /* vec_align_load_cost. */ 4, /* vec_unalign_load_cost. */ 4, /* vec_store_cost. */ - 2, /* cond_taken_branch_cost. */ - 1, /* cond_not_taken_branch_cost. */ + 4, /* cond_taken_branch_cost. */ + 2, /* cond_not_taken_branch_cost. */ }; /* BDVER2 has optimized REP instruction for medium sized blocks, but for @@ -1121,8 +1121,8 @@ const struct processor_costs bdver2_cost = { 4, /* vec_align_load_cost. */ 4, /* vec_unalign_load_cost. */ 4, /* vec_store_cost. */ - 2, /* cond_taken_branch_cost. */ - 1, /* cond_not_taken_branch_cost. */ + 4, /* cond_taken_branch_cost. */ + 2, /* cond_not_taken_branch_cost. */ }; @@ -1208,8 +1208,8 @@ struct processor_costs bdver3_cost = { 4, /* vec_align_load_cost. */ 4, /* vec_unalign_load_cost. */ 4, /* vec_store_cost. */ - 2, /* cond_taken_branch_cost. */ - 1, /* cond_not_taken_branch_cost. */ + 4, /* cond_taken_branch_cost. */ + 2, /* cond_not_taken_branch_cost. */ }; /* BDVER4 has optimized REP instruction for medium sized blocks, but for @@ -1294,8 +1294,8 @@ struct processor_costs bdver4_cost = { 4, /* vec_align_load_cost. */ 4, /* vec_unalign_load_cost. */ 4, /* vec_store_cost. */ - 2, /* cond_taken_branch_cost. */ - 1, /* cond_not_taken_branch_cost. */ + 4, /* cond_taken_branch_cost. */ + 2, /* cond_not_taken_branch_cost. */ }; /* BTVER1 has optimized REP instruction for medium sized blocks, but for |