diff options
| author | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-05-10 09:00:53 +0000 |
|---|---|---|
| committer | krebbel <krebbel@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-05-10 09:00:53 +0000 |
| commit | 28d5f4ba40e1ebf30e155f9c8c561f225355387f (patch) | |
| tree | 9e4060cc9f5d3002477bf29257f4697884839017 /gcc/config | |
| parent | 76825907d9b0e20cbb572d0d70248a4ed332fb29 (diff) | |
| download | gcc-28d5f4ba40e1ebf30e155f9c8c561f225355387f.tar.gz | |
S/390: Disable scalar vector instructions with -mno-vx.
Although the scalar variants of the vector instructions aren't
actually vector instructions they are still executed in the vector
facility and therefore need to be disabled when disabling the facility
with -mno-vx.
Fixed with the attached patch. Committed to head, GCC 6, and GCC 5
branches.
gcc/ChangeLog:
2016-05-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("*vec_cmp<insn_cmp>df_cconly")
("*fixuns_truncdfdi2_z13")
("*fixuns_trunc<FP:mode><GPR:mode>2_z196")
("*fix_truncdfdi2_bfp_z13", "*floatunsdidf2_z13")
("*extendsfdf2_z13"): Replace TARGET_Z13 with TARGET_VX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@236067 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/s390/s390.md | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index faaa7f3fc9f..caf8ed558c3 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -1305,7 +1305,7 @@ (compare:VFCMP (match_operand:DF 0 "register_operand" "v") (match_operand:DF 1 "register_operand" "v"))) (clobber (match_scratch:V2DI 2 "=v"))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "wfc<asm_fcmp>dbs\t%v2,%v0,%v1" [(set_attr "op_type" "VRR")]) @@ -4703,7 +4703,7 @@ (unsigned_fix:DI (match_operand:DF 1 "register_operand" "f,v"))) (unspec:DI [(match_operand:DI 2 "immediate_operand" "K,K")] UNSPEC_ROUND) (clobber (reg:CC CC_REGNUM))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ clgdbr\t%0,%h2,%1,0 wclgdb\t%v0,%v1,0,%h2" @@ -4718,7 +4718,7 @@ (unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC CC_REGNUM))] "TARGET_Z196 && TARGET_HARD_FLOAT - && (!TARGET_Z13 || <GPR:MODE>mode != DImode || <FP:MODE>mode != DFmode)" + && (!TARGET_VX || <GPR:MODE>mode != DImode || <FP:MODE>mode != DFmode)" "cl<GPR:gf><FP:xde><FP:bt>r\t%0,%h2,%1,0" [(set_attr "op_type" "RRF") (set_attr "type" "ftoi")]) @@ -4738,7 +4738,7 @@ (fix:DI (match_operand:DF 1 "register_operand" "f,v"))) (unspec:DI [(match_operand:DI 2 "immediate_operand" "K,K")] UNSPEC_ROUND) (clobber (reg:CC CC_REGNUM))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ cgdbr\t%0,%h2,%1 wcgdb\t%v0,%v1,0,%h2" @@ -4846,7 +4846,7 @@ (define_insn "*floatunsdidf2_z13" [(set (match_operand:DF 0 "register_operand" "=f,v") (unsigned_float:DF (match_operand:DI 1 "register_operand" "d,v")))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ cdlgbr\t%0,0,%1,0 wcdlgb\t%v0,%v1,0,0" @@ -4950,7 +4950,7 @@ (define_insn "*extendsfdf2_z13" [(set (match_operand:DF 0 "register_operand" "=f,f,v") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,R,v")))] - "TARGET_Z13 && TARGET_HARD_FLOAT" + "TARGET_VX && TARGET_HARD_FLOAT" "@ ldebr\t%0,%1 ldeb\t%0,%1 |