diff options
| author | schwab <schwab@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-05-21 18:43:27 +0000 |
|---|---|---|
| committer | schwab <schwab@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-05-21 18:43:27 +0000 |
| commit | eddf6a68d14328995592acc1ffeb4a7656ac0386 (patch) | |
| tree | d24e1b502f84d74ee1c74d605084deef86023b02 /gcc/config | |
| parent | 6ad451f880a0b1df1498dc8f2aafcabaf70c7ad1 (diff) | |
| download | gcc-eddf6a68d14328995592acc1ffeb4a7656ac0386.tar.gz | |
* config/m68k/m68k.md (*clzsi2_cf): Renamed from clzsi2. Call
CC_STATUS_INIT.
(clzsi2): New expander.
(*clzsi2_68k): New insn.
* config/m68k/m68k.h: Update comment about
CLZ_DEFINED_VALUE_AT_ZERO.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@187731 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/m68k/m68k.h | 4 | ||||
| -rw-r--r-- | gcc/config/m68k/m68k.md | 25 |
2 files changed, 25 insertions, 4 deletions
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 0a390d074d4..b8d8d9ce922 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GCC for Motorola 680x0/ColdFire. Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. This file is part of GCC. @@ -698,7 +698,7 @@ __transfer_from_trampoline () \ #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 -/* The ColdFire FF1 instruction returns 32 for zero. */ +/* The 68020 BFFFO and ColdFire FF1 instructions return 32 for zero. */ #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1) #define STORE_FLAG_VALUE (-1) diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 8fc81b53e09..0225b7ef2ed 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -4467,12 +4467,33 @@ ;; bit indexing instructions +(define_expand "clzsi2" + [(set (match_operand:SI 0 "register_operand" "") + (clz:SI (match_operand:SI 1 "general_operand" "")))] + "ISA_HAS_FF1 || (TARGET_68020 && TARGET_BITFIELD)" +{ + if (ISA_HAS_FF1) + operands[1] = force_reg (SImode, operands[1]); +}) + +(define_insn "*clzsi2_68k" + [(set (match_operand:SI 0 "register_operand" "=d") + (clz:SI (match_operand:SI 1 "general_operand" "do")))] + "TARGET_68020 && TARGET_BITFIELD" +{ + CC_STATUS_INIT; + return "bfffo %1{#0:#0},%0"; +}) + ;; ColdFire ff1 instruction implements clz. -(define_insn "clzsi2" +(define_insn "*clzsi2_cf" [(set (match_operand:SI 0 "register_operand" "=d") (clz:SI (match_operand:SI 1 "register_operand" "0")))] "ISA_HAS_FF1" - "ff1 %0" +{ + CC_STATUS_INIT; + return "ff1 %0"; +} [(set_attr "type" "ext")]) ;; one complement instructions |