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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2004-07-15 17:59:11 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2004-07-15 17:59:11 +0000
commitd0d035c893b7e1c5ba8567b77958fcf98bdd08f8 (patch)
treec1dd271f6170f03f7ee0988b1e73eafff633e672 /gcc/config
parent71558babb8b846dc5d8e787c36b1ac632d463ef6 (diff)
downloadgcc-d0d035c893b7e1c5ba8567b77958fcf98bdd08f8.tar.gz
* config/mips/mips.md: In the mips16 li/neg splitter, use SImode for
the destination of the li as well as for the neg. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@84764 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/mips/mips.md12
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index fa096d33357..79d90609738 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4748,13 +4748,13 @@ dsrl\t%3,%3,1\n\
[(set (match_operand 0 "register_operand")
(match_operand 1 "const_int_operand"))]
"TARGET_MIPS16 && reload_completed && INTVAL (operands[1]) < 0"
- [(set (match_dup 0)
- (match_dup 2))
- (set (match_dup 3)
- (neg:SI (match_dup 3)))]
+ [(set (match_dup 2)
+ (match_dup 3))
+ (set (match_dup 2)
+ (neg:SI (match_dup 2)))]
{
- operands[2] = GEN_INT (-INTVAL (operands[1]));
- operands[3] = gen_lowpart (SImode, operands[0]);
+ operands[2] = gen_lowpart (SImode, operands[0]);
+ operands[3] = GEN_INT (-INTVAL (operands[1]));
})
;; The HI and LO registers are not truly independent. If we move an mthi