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| author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1999-08-04 19:27:02 +0000 |
|---|---|---|
| committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1999-08-04 19:27:02 +0000 |
| commit | 53c293b6af788be05f61429c15c1302e0feee402 (patch) | |
| tree | db2c31793c1348c27035ddf0402006bd55abb6ce /gcc/config | |
| parent | a1b9e7cafdf419e78c7a9f2799788593a1cdb52d (diff) | |
| download | gcc-53c293b6af788be05f61429c15c1302e0feee402.tar.gz | |
* pa.md (divsi3, udivsi3, modsi3, umodsi3 expanders): Clobber a new
dummy operand. Allocate a new pseudo for the dummy operand.
(divsi3, udivsi3, modis3, umodsi3 patterns): Corresponding changes.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@28502 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/pa/pa.md | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 2ab9cd721c2..8b22dc09856 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -3173,6 +3173,7 @@ (set (reg:SI 25) (match_operand:SI 2 "move_operand" "")) (parallel [(set (reg:SI 29) (div:SI (reg:SI 26) (reg:SI 25))) (clobber (match_dup 3)) + (clobber (match_dup 4)) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))]) @@ -3181,6 +3182,7 @@ " { operands[3] = gen_reg_rtx (SImode); + operands[4] = gen_reg_rtx (SImode); if (GET_CODE (operands[2]) == CONST_INT && emit_hpdiv_const (operands, 0)) DONE; }") @@ -3189,6 +3191,7 @@ [(set (reg:SI 29) (div:SI (reg:SI 26) (match_operand:SI 0 "div_operand" ""))) (clobber (match_operand:SI 1 "register_operand" "=a")) + (clobber (match_operand:SI 2 "register_operand" "=&r")) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))] @@ -3226,6 +3229,7 @@ (set (reg:SI 25) (match_operand:SI 2 "move_operand" "")) (parallel [(set (reg:SI 29) (udiv:SI (reg:SI 26) (reg:SI 25))) (clobber (match_dup 3)) + (clobber (match_dup 4)) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))]) @@ -3234,6 +3238,7 @@ " { operands[3] = gen_reg_rtx (SImode); + operands[4] = gen_reg_rtx (SImode); if (GET_CODE (operands[2]) == CONST_INT && emit_hpdiv_const (operands, 1)) DONE; }") @@ -3242,6 +3247,7 @@ [(set (reg:SI 29) (udiv:SI (reg:SI 26) (match_operand:SI 0 "div_operand" ""))) (clobber (match_operand:SI 1 "register_operand" "=a")) + (clobber (match_operand:SI 2 "register_operand" "=&r")) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))] @@ -3279,6 +3285,7 @@ (set (reg:SI 25) (match_operand:SI 2 "move_operand" "")) (parallel [(set (reg:SI 29) (mod:SI (reg:SI 26) (reg:SI 25))) (clobber (match_dup 3)) + (clobber (match_dup 4)) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))]) @@ -3286,12 +3293,14 @@ "" " { + operands[4] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); }") (define_insn "" [(set (reg:SI 29) (mod:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a")) + (clobber (match_operand:SI 2 "register_operand" "=&r")) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))] @@ -3329,6 +3338,7 @@ (set (reg:SI 25) (match_operand:SI 2 "move_operand" "")) (parallel [(set (reg:SI 29) (umod:SI (reg:SI 26) (reg:SI 25))) (clobber (match_dup 3)) + (clobber (match_dup 4)) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))]) @@ -3336,12 +3346,14 @@ "" " { + operands[4] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); }") (define_insn "" [(set (reg:SI 29) (umod:SI (reg:SI 26) (reg:SI 25))) (clobber (match_operand:SI 0 "register_operand" "=a")) + (clobber (match_operand:SI 2 "register_operand" "=&r")) (clobber (reg:SI 26)) (clobber (reg:SI 25)) (clobber (reg:SI 31))] |