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| author | ciceron <ciceron@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-05-04 20:55:27 +0000 |
|---|---|---|
| committer | ciceron <ciceron@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-05-04 20:55:27 +0000 |
| commit | 1dd3f74eb27adc7d1af9ea13cb7184f2ed52cda5 (patch) | |
| tree | 028dbacd308234d9a958c3335ae83ae43158ddb6 /gcc/config | |
| parent | 8a5b1d77c8257d2ae36a0d33df9d8a7115ddd36d (diff) | |
| download | gcc-1dd3f74eb27adc7d1af9ea13cb7184f2ed52cda5.tar.gz | |
* config/m68hc11/larith.asm (L_regs_frame): New for _.frame.
Put the soft registers in bss for 68HC12.
(L_regs_d3_4): New for _.d3 and _.d4.
(L_regs_d5_6): Likewise.
(L_regs_d1_2): Likewise.
* config/m68hc11/t-m68hc11-gas (T_CPPFLAGS): Compile new parts.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@41846 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/m68hc11/larith.asm | 51 | ||||
| -rw-r--r-- | gcc/config/m68hc11/t-m68hc11-gas | 3 |
2 files changed, 43 insertions, 11 deletions
diff --git a/gcc/config/m68hc11/larith.asm b/gcc/config/m68hc11/larith.asm index 07f09ead0e1..e7b486c8ee6 100644 --- a/gcc/config/m68hc11/larith.asm +++ b/gcc/config/m68hc11/larith.asm @@ -52,38 +52,69 @@ NAME: .word 0; \ #else .sect .page0 #endif - .globl _.tmp,_.frame + .globl _.tmp .globl _.z,_.xy REG(_.tmp) REG(_.z) REG(_.xy) -REG(_.frame) #endif -#ifdef L_regs_d1_8 -/* Pseudo hard registers used by gcc. - They must be located in page0. - They will normally appear at the end of .page0 section. */ +#ifdef L_regs_frame #ifdef mc68hc12 .sect .bss #else .sect .page0 #endif - .globl _.d1,_.d2,_.d3,_.d4,_.d5,_.d6 - .globl _.d7,_.d8 + .globl _.frame +REG(_.frame) +#endif + +#ifdef L_regs_d1_2 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d1,_.d2 REG(_.d1) REG(_.d2) +#endif + +#ifdef L_regs_d3_4 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d3,_.d4 REG(_.d3) REG(_.d4) +#endif + +#ifdef L_regs_d5_6 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d5,_.d6 REG(_.d5) REG(_.d6) +#endif + +#ifdef L_regs_d7_8 +#ifdef mc68hc12 + .sect .bss +#else + .sect .page0 +#endif + .globl _.d7,_.d8 REG(_.d7) REG(_.d8) - #endif -#ifdef L_regs_d8_16 +#ifdef L_regs_d9_16 /* Pseudo hard registers used by gcc. They must be located in page0. They will normally appear at the end of .page0 section. */ diff --git a/gcc/config/m68hc11/t-m68hc11-gas b/gcc/config/m68hc11/t-m68hc11-gas index ec4b59e027b..9ee3c313f8a 100644 --- a/gcc/config/m68hc11/t-m68hc11-gas +++ b/gcc/config/m68hc11/t-m68hc11-gas @@ -21,7 +21,8 @@ LIB1ASMFUNCS = _mulsi3 \ _mulqi3 _ashlsi3 _ashrsi3 _lshrsi3 \ _divmodhi4 _mulhi3 _mulhi32 \ _memcpy _memset _negsi2 _one_cmplsi2 \ - _regs_min _regs_d1_8 _regs_d8_16 _regs_d17_32 \ + _regs_min _regs_frame _regs_d1_2 \ + _regs_d3_4 _regs_d5_6 _regs_d7_8 _regs_d9_16 _regs_d17_32 \ _premain __exit _abort _cleanup \ _adddi3 _subdi3 _notdi2 \ _ashrhi3 _lshrhi3 _lshlhi3 _ashrqi3 _lshlqi3 _map_data _init_bss |