diff options
| author | walt <walt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-02-03 18:41:57 +0000 |
|---|---|---|
| committer | walt <walt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-02-03 18:41:57 +0000 |
| commit | 6a1eedf12fe1a800c7326df2eb43769ef51d4e71 (patch) | |
| tree | ee31af49185c9ceec99bcc3ee41eddd3a7825aef /gcc/config/tilepro | |
| parent | e4a330c44c2b2b9dc22fc5036adb0ec6976a81cc (diff) | |
| download | gcc-6a1eedf12fe1a800c7326df2eb43769ef51d4e71.tar.gz | |
PR target/78862
* config/tilegx/tilegx.md (tilegx_expand_prologue): Add blockage
after initial stackframe link reg save.
* config/tilepro/tilepro.md (tilepro_expand_prologue): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@245159 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/tilepro')
| -rw-r--r-- | gcc/config/tilepro/tilepro.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c index b16ad388b86..aa1bb1c5371 100644 --- a/gcc/config/tilepro/tilepro.c +++ b/gcc/config/tilepro/tilepro.c @@ -3533,8 +3533,11 @@ tilepro_expand_prologue (void) /* Save lr first in its special location because code after this might use the link register as a scratch register. */ if (df_regs_ever_live_p (TILEPRO_LINK_REGNUM) || crtl->calls_eh_return) - FRP (frame_emit_store (TILEPRO_LINK_REGNUM, TILEPRO_LINK_REGNUM, - stack_pointer_rtx, stack_pointer_rtx, 0)); + { + FRP (frame_emit_store (TILEPRO_LINK_REGNUM, TILEPRO_LINK_REGNUM, + stack_pointer_rtx, stack_pointer_rtx, 0)); + emit_insn (gen_blockage ()); + } if (total_size == 0) { |