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authorSa Liu <saliu@de.ibm.com>2007-07-13 18:31:08 +0000
committerUlrich Weigand <uweigand@gcc.gnu.org>2007-07-13 18:31:08 +0000
commit39aeae8573ed2085fbfad05f3e8ba1456fcb6d44 (patch)
tree5426797cdb67dde5f5c7640c88b2c18b729ddd9b /gcc/config/spu/spu_internals.h
parent2826df069f786fb321bb60525340fffaa1f22b6b (diff)
downloadgcc-39aeae8573ed2085fbfad05f3e8ba1456fcb6d44.tar.gz
config.gcc: Add options for arch and tune on SPU.
2007-07-13 Sa Liu <saliu@de.ibm.com> * config.gcc: Add options for arch and tune on SPU. * config/spu/predicates.md: Add constant operands 0 and 1. * config/spu/spu-builtins.def: Add builtins for double precision floating point comparison: si_dfceq, si_dfcmeq, si_dfcgt, si_dfcmgt, si_dftsv, spu_cmpeq_13, spu_cmpabseq_1, spu_cmpgt_13, spu_cmpabsgt_1, spu_testsv. * config/spu/spu-c.c: Define __SPU_EDP__ when builtins invoked with a CELLEDP target. * config/spu/spu-protos.h: Add new function prototypes. * config/spu/spu.c (spu_override_options): Check options -march and -mtune. (spu_comp_icode): Add comparison code for DFmode and vector mode. (spu_emit_branch_or_set): Use the new code for DFmode and vector mode comparison. (spu_const_from_int): New. Create a vector constant from 4 ints. (get_vec_cmp_insn): New. Get insn index of vector compare instruction. (spu_emit_vector_compare): New. Emit vector compare. (spu_emit_vector_cond_expr): New. Emit vector conditional expression. * config/spu/spu.h: Add options -march and -mtune. Define processor types PROCESSOR_CELL and PROCESSOR_CELLEDP. Define macro CANONICALIZE_COMPARISON. * config/spu/spu.md: Add new insns for double precision compare and double precision vector compare. Add vcond and smax/smin patterns to enable DFmode vector conditional expression. * config/spu/spu.opt: Add options -march and -mtune. * config/spu/spu_internals.h: Add builtins for CELLEDP target: si_dfceq, si_dfcmeq, si_dfcgt, si_dfcmgt, si_dftsv. Add builtin for both CELL and CELLEDP targets: spu_testsv. * config/spu/spu_intrinsics.h: Add flag mnemonics for test special values. testsuite/ * gcc.dg/vect/fast-math-vect-reduc-7.c: Switch on test for V2DFmode vector conditional expression. * gcc.target/spu/dfcmeq.c: New. Test combination of abs and dfceq patterns. * gcc.target/spu/dfcmgt.c: New. Test combination of abs and dfcgt patterns. * gcc.target/spu/intrinsics-2.c: New. Test intrinsics for V2DFmode comparison and test special values. * lib/target-supports.exp: Switch on test for V2DFmode vector conditional expression. From-SVN: r126626
Diffstat (limited to 'gcc/config/spu/spu_internals.h')
-rw-r--r--gcc/config/spu/spu_internals.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/gcc/config/spu/spu_internals.h b/gcc/config/spu/spu_internals.h
index ecc8dc552ae..fb42c870983 100644
--- a/gcc/config/spu/spu_internals.h
+++ b/gcc/config/spu/spu_internals.h
@@ -233,6 +233,15 @@
#define si_rchcnt(imm) __builtin_si_rchcnt(imm)
#define si_wrch(imm,ra) __builtin_si_wrch(imm,ra)
+/* celledp only instructions */
+#ifdef __SPU_EDP__
+#define si_dfceq(ra,rb) __builtin_si_dfceq(ra,rb)
+#define si_dfcmeq(ra,rb) __builtin_si_dfcmeq(ra,rb)
+#define si_dfcgt(ra,rb) __builtin_si_dfcgt(ra,rb)
+#define si_dfcmgt(ra,rb) __builtin_si_dfcmgt(ra,rb)
+#define si_dftsv(ra,imm) __builtin_si_dftsv(ra,imm)
+#endif /* __SPU_EDP__ */
+
#define si_from_char(scalar) __builtin_si_from_char(scalar)
#define si_from_uchar(scalar) __builtin_si_from_uchar(scalar)
#define si_from_short(scalar) __builtin_si_from_short(scalar)
@@ -295,6 +304,7 @@
#define spu_cmpabsgt(ra,rb) __builtin_spu_cmpabsgt(ra,rb)
#define spu_cmpeq(ra,rb) __builtin_spu_cmpeq(ra,rb)
#define spu_cmpgt(ra,rb) __builtin_spu_cmpgt(ra,rb)
+#define spu_testsv(ra,imm) __builtin_spu_testsv(ra,imm)
#define spu_hcmpeq(ra,rb) __builtin_spu_hcmpeq(ra,rb)
#define spu_hcmpgt(ra,rb) __builtin_spu_hcmpgt(ra,rb)
#define spu_cntb(ra) __builtin_spu_cntb(ra)