2007-07-13 Sa Liu <saliu@de.ibm.com>

	* config.gcc: Add options for arch and tune on SPU.
	* config/spu/predicates.md: Add constant operands 0 and 1.
	* config/spu/spu-builtins.def: Add builtins for double precision 
	floating point comparison: si_dfceq, si_dfcmeq,	si_dfcgt, si_dfcmgt, 
	si_dftsv, spu_cmpeq_13, spu_cmpabseq_1, spu_cmpgt_13, spu_cmpabsgt_1,
	spu_testsv.
	* config/spu/spu-c.c: Define __SPU_EDP__ when builtins invoked with 
	a CELLEDP target.
	* config/spu/spu-protos.h: Add new function prototypes. 
	* config/spu/spu.c (spu_override_options): Check options -march and
	-mtune.
	(spu_comp_icode): Add comparison code for DFmode and vector mode.
	(spu_emit_branch_or_set): Use the new code for DFmode and vector 
	mode comparison.
	(spu_const_from_int): New.  Create a vector constant from 4 ints.
	(get_vec_cmp_insn): New.  Get insn index of vector compare instruction.
	(spu_emit_vector_compare): New.  Emit vector compare.
	(spu_emit_vector_cond_expr): New.  Emit vector conditional expression.
	* config/spu/spu.h: Add options -march and -mtune.  Define processor
	types PROCESSOR_CELL and PROCESSOR_CELLEDP.  Define macro
	CANONICALIZE_COMPARISON.
	* config/spu/spu.md: Add new insns for double precision compare
	and double precision vector compare.  Add vcond and smax/smin patterns
	to enable DFmode vector conditional expression.
	* config/spu/spu.opt: Add options -march and -mtune.
	* config/spu/spu_internals.h: Add builtins for CELLEDP target:
	si_dfceq, si_dfcmeq, si_dfcgt, si_dfcmgt, si_dftsv.  Add builtin for
	both CELL and CELLEDP targets: spu_testsv.
	* config/spu/spu_intrinsics.h: Add flag mnemonics for test special 
	values.

testsuite/
	* gcc.dg/vect/fast-math-vect-reduc-7.c: Switch on test
	for V2DFmode vector conditional expression.
	* gcc.target/spu/dfcmeq.c: New.  Test combination of abs
	and dfceq patterns.
	* gcc.target/spu/dfcmgt.c: New.  Test combination of abs
	and dfcgt patterns.
	* gcc.target/spu/intrinsics-2.c: New.  Test intrinsics for
	V2DFmode comparison and test special values.
	* lib/target-supports.exp: Switch on test for V2DFmode 
	vector conditional expression.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@126626 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 3 insertions, 0 deletions

diff --git a/gcc/config/spu/spu-protos.h b/gcc/config/spu/spu-protos.h
index 4caaf1b8a69..d06953694d4 100644
--- a/gcc/config/spu/spu-protos.h
+++ b/gcc/config/spu/spu-protos.h
@@ -32,6 +32,7 @@ extern void spu_expand_insv (rtx * ops);
 extern int spu_expand_block_move (rtx * ops);
 extern void spu_emit_branch_or_set (int is_set, enum rtx_code code,
 				    rtx * operands);
+extern int spu_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx);
 extern HOST_WIDE_INT const_double_to_hwint (rtx x);
 extern rtx hwint_to_const_double (enum machine_mode mode, HOST_WIDE_INT v);
 extern void print_operand_address (FILE * file, register rtx addr);
@@ -43,6 +44,8 @@ extern void spu_expand_prologue (void);
 extern void spu_expand_epilogue (unsigned char sibcall_p);
 extern rtx spu_return_addr (int count, rtx frame);
 extern rtx spu_const (enum machine_mode mode, HOST_WIDE_INT val);
+extern rtx spu_const_from_ints (enum machine_mode mode, 
+			        int a, int b, int c, int d);
 extern struct rtx_def *spu_float_const (const char *string,
 					enum machine_mode mode);
 extern int immediate_load_p (rtx op, enum machine_mode mode);