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| author | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-01-27 14:42:36 +0000 |
|---|---|---|
| committer | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-01-27 14:42:36 +0000 |
| commit | 781229970d3d552ce0883bd045490d178412f6f7 (patch) | |
| tree | 0c3946439f6563c3412bf9d01dddc4fb80a2aca6 /gcc/config/sparc/sparc.h | |
| parent | 3e2890d8a1cd592d3f213968b5acdef82fa3336d (diff) | |
| download | gcc-781229970d3d552ce0883bd045490d178412f6f7.tar.gz | |
* config/sparc/sparc.c (function_arg_pass_by_reference): Return 1
for SCmode and DCmode if ARCH32.
(sparc_va_arg): Handle SCmode and DCmode by reference if ARCH32.
* config/sparc/sparc.h (RETURN_IN_MEMORY): Return 0 for TCmode
if ARCH32.
(BASE_RETURN_VALUE_REG): Return 32 for all FP modes except TFmode
if ARCH32.
(BASE_OUTGOING_VALUE_REG): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@76708 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/sparc/sparc.h')
| -rw-r--r-- | gcc/config/sparc/sparc.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index eeab3c6a7fd..364bea099e3 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1157,8 +1157,7 @@ extern int sparc_mode_class[]; #define RETURN_IN_MEMORY(TYPE) \ (TARGET_ARCH32 \ ? (TYPE_MODE (TYPE) == BLKmode \ - || TYPE_MODE (TYPE) == TFmode \ - || TYPE_MODE (TYPE) == TCmode) \ + || TYPE_MODE (TYPE) == TFmode) \ : (TYPE_MODE (TYPE) == BLKmode \ && (unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) > 32)) @@ -1671,13 +1670,13 @@ extern char leaf_reg_remap[]; #define BASE_RETURN_VALUE_REG(MODE) \ (TARGET_ARCH64 \ ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8) \ - : (((MODE) == SFmode || (MODE) == DFmode) && TARGET_FPU ? 32 : 8)) + : (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32 : 8)) #define BASE_OUTGOING_VALUE_REG(MODE) \ (TARGET_ARCH64 \ ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 \ : TARGET_FLAT ? 8 : 24) \ - : (((MODE) == SFmode || (MODE) == DFmode) && TARGET_FPU ? 32 \ + : (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32\ : (TARGET_FLAT ? 8 : 24))) #define BASE_PASSING_ARG_REG(MODE) \ |