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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2014-10-29 12:02:45 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2014-10-29 12:02:45 +0000
commit3754d04677134616a06eabd18d3f4476e5f5ec23 (patch)
tree9a57dad975c942ce6765490066e2492bc1ce59e9 /gcc/config/sparc/sparc.c
parentced116009c07993af907d1b21b97f68ea6682cd3 (diff)
downloadgcc-3754d04677134616a06eabd18d3f4476e5f5ec23.tar.gz
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c, gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c: Remove redundant enum from machine_mode. gcc/c-family/ * c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant enum from machine_mode. gcc/c/ * c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from machine_mode. gcc/cp/ * constexpr.c: Remove redundant enum from machine_mode. gcc/fortran/ * trans-types.c, trans-types.h: Remove redundant enum from machine_mode. gcc/go/ * go-lang.c: Remove redundant enum from machine_mode. gcc/java/ * builtins.c, java-tree.h, typeck.c: Remove redundant enum from machine_mode. gcc/lto/ * lto-lang.c: Remove redundant enum from machine_mode. gcc/ * addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c, builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h, cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c, config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md, config/aarch64/aarch64.c, config/aarch64/aarch64.h, config/aarch64/aarch64.md, config/alpha/alpha-protos.h, config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c, config/arc/arc.h, config/arc/predicates.md, config/arm/aarch-common-protos.h, config/arm/aarch-common.c, config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h, config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md, config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c, config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c, config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md, config/cr16/cr16-protos.h, config/cr16/cr16.c, config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md, config/darwin-protos.h, config/darwin.c, config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c, config/epiphany/epiphany.md, config/fr30/fr30.c, config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md, config/h8300/h8300-protos.h, config/h8300/h8300.c, config/i386/i386-builtin-types.awk, config/i386/i386-protos.h, config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md, config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h, config/ia64/ia64.c, config/iq2000/iq2000-protos.h, config/iq2000/iq2000.c, config/iq2000/iq2000.md, config/lm32/lm32-protos.h, config/lm32/lm32.c, config/m32c/m32c-protos.h, config/m32c/m32c.c, config/m32r/m32r-protos.h, config/m32r/m32r.c, config/m68k/m68k-protos.h, config/m68k/m68k.c, config/mcore/mcore-protos.h, config/mcore/mcore.c, config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c, config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c, config/mips/mips-protos.h, config/mips/mips.c, config/mmix/mmix-protos.h, config/mmix/mmix.c, config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c, config/moxie/moxie.c, config/msp430/msp430-protos.h, config/msp430/msp430.c, config/nds32/nds32-cost.c, config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c, config/nds32/nds32-protos.h, config/nds32/nds32.c, config/nios2/nios2-protos.h, config/nios2/nios2.c, config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h, config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c, config/rs6000/altivec.md, config/rs6000/rs6000-c.c, config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c, config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c, config/s390/predicates.md, config/s390/s390-protos.h, config/s390/s390.c, config/s390/s390.h, config/s390/s390.md, config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c, config/sh/sh.md, config/sparc/predicates.md, config/sparc/sparc-protos.h, config/sparc/sparc.c, config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c, config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c, config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c, config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h, config/tilepro/tilepro.c, config/v850/v850-protos.h, config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h, config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h, config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h, dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi, doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c, dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h, except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c, fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h, fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c, genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c, graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c, internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c, ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h, libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c, loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c, lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c, lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h, output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h, recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c, regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h, rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c, sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c, simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def, targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c, tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c, tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c, tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c, tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c, tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c, tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c, tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c, tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c, tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c, var-tracking.c, varasm.c: Remove redundant enum from machine_mode. gcc/ * gengtype.c (main): Treat machine_mode as a scalar typedef. * genmodes.c (emit_insn_modes_h): Hide inline functions if USED_FOR_TARGET. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216834 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/sparc/sparc.c')
-rw-r--r--gcc/config/sparc/sparc.c156
1 files changed, 78 insertions, 78 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index c44a6651323..6287348715b 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -544,7 +544,7 @@ int sparc_indent_opcode = 0;
static void sparc_option_override (void);
static void sparc_init_modes (void);
static void scan_record_type (const_tree, int *, int *, int *);
-static int function_arg_slotno (const CUMULATIVE_ARGS *, enum machine_mode,
+static int function_arg_slotno (const CUMULATIVE_ARGS *, machine_mode,
const_tree, bool, bool, int *, int *);
static int supersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
@@ -555,8 +555,8 @@ static void sparc_emit_set_const64 (rtx, rtx);
static void sparc_output_addr_vec (rtx);
static void sparc_output_addr_diff_vec (rtx);
static void sparc_output_deferred_case_vectors (void);
-static bool sparc_legitimate_address_p (enum machine_mode, rtx, bool);
-static bool sparc_legitimate_constant_p (enum machine_mode, rtx);
+static bool sparc_legitimate_address_p (machine_mode, rtx, bool);
+static bool sparc_legitimate_constant_p (machine_mode, rtx);
static rtx sparc_builtin_saveregs (void);
static int epilogue_renumber (rtx *, int);
static bool sparc_assemble_integer (rtx, unsigned int, int);
@@ -584,50 +584,50 @@ static void sparc_init_builtins (void);
static void sparc_fpu_init_builtins (void);
static void sparc_vis_init_builtins (void);
static tree sparc_builtin_decl (unsigned, bool);
-static rtx sparc_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
+static rtx sparc_expand_builtin (tree, rtx, rtx, machine_mode, int);
static tree sparc_fold_builtin (tree, int, tree *, bool);
static void sparc_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
HOST_WIDE_INT, tree);
static bool sparc_can_output_mi_thunk (const_tree, HOST_WIDE_INT,
HOST_WIDE_INT, const_tree);
static struct machine_function * sparc_init_machine_status (void);
-static bool sparc_cannot_force_const_mem (enum machine_mode, rtx);
+static bool sparc_cannot_force_const_mem (machine_mode, rtx);
static rtx sparc_tls_get_addr (void);
static rtx sparc_tls_got (void);
-static int sparc_register_move_cost (enum machine_mode,
+static int sparc_register_move_cost (machine_mode,
reg_class_t, reg_class_t);
static bool sparc_rtx_costs (rtx, int, int, int, int *, bool);
static rtx sparc_function_value (const_tree, const_tree, bool);
-static rtx sparc_libcall_value (enum machine_mode, const_rtx);
+static rtx sparc_libcall_value (machine_mode, const_rtx);
static bool sparc_function_value_regno_p (const unsigned int);
static rtx sparc_struct_value_rtx (tree, int);
-static enum machine_mode sparc_promote_function_mode (const_tree, enum machine_mode,
+static machine_mode sparc_promote_function_mode (const_tree, machine_mode,
int *, const_tree, int);
static bool sparc_return_in_memory (const_tree, const_tree);
static bool sparc_strict_argument_naming (cumulative_args_t);
static void sparc_va_start (tree, rtx);
static tree sparc_gimplify_va_arg (tree, tree, gimple_seq *, gimple_seq *);
-static bool sparc_vector_mode_supported_p (enum machine_mode);
+static bool sparc_vector_mode_supported_p (machine_mode);
static bool sparc_tls_referenced_p (rtx);
static rtx sparc_legitimize_tls_address (rtx);
static rtx sparc_legitimize_pic_address (rtx, rtx);
-static rtx sparc_legitimize_address (rtx, rtx, enum machine_mode);
+static rtx sparc_legitimize_address (rtx, rtx, machine_mode);
static rtx sparc_delegitimize_address (rtx);
static bool sparc_mode_dependent_address_p (const_rtx, addr_space_t);
static bool sparc_pass_by_reference (cumulative_args_t,
- enum machine_mode, const_tree, bool);
+ machine_mode, const_tree, bool);
static void sparc_function_arg_advance (cumulative_args_t,
- enum machine_mode, const_tree, bool);
+ machine_mode, const_tree, bool);
static rtx sparc_function_arg_1 (cumulative_args_t,
- enum machine_mode, const_tree, bool, bool);
+ machine_mode, const_tree, bool, bool);
static rtx sparc_function_arg (cumulative_args_t,
- enum machine_mode, const_tree, bool);
+ machine_mode, const_tree, bool);
static rtx sparc_function_incoming_arg (cumulative_args_t,
- enum machine_mode, const_tree, bool);
-static unsigned int sparc_function_arg_boundary (enum machine_mode,
+ machine_mode, const_tree, bool);
+static unsigned int sparc_function_arg_boundary (machine_mode,
const_tree);
static int sparc_arg_partial_bytes (cumulative_args_t,
- enum machine_mode, tree, bool);
+ machine_mode, tree, bool);
static void sparc_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
static void sparc_file_end (void);
static bool sparc_frame_pointer_required (void);
@@ -638,15 +638,15 @@ static void sparc_conditional_register_usage (void);
static const char *sparc_mangle_type (const_tree);
#endif
static void sparc_trampoline_init (rtx, tree, rtx);
-static enum machine_mode sparc_preferred_simd_mode (enum machine_mode);
+static machine_mode sparc_preferred_simd_mode (machine_mode);
static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass);
static bool sparc_print_operand_punct_valid_p (unsigned char);
static void sparc_print_operand (FILE *, rtx, int);
static void sparc_print_operand_address (FILE *, rtx);
static reg_class_t sparc_secondary_reload (bool, rtx, reg_class_t,
- enum machine_mode,
+ machine_mode,
secondary_reload_info *);
-static enum machine_mode sparc_cstore_mode (enum insn_code icode);
+static machine_mode sparc_cstore_mode (enum insn_code icode);
static void sparc_atomic_assign_expand_fenv (tree *, tree *, tree *);
#ifdef SUBTARGET_ATTRIBUTE_TABLE
@@ -1747,7 +1747,7 @@ can_use_mov_pic_label_ref (rtx label)
/* Expand a move instruction. Return true if all work is done. */
bool
-sparc_expand_move (enum machine_mode mode, rtx *operands)
+sparc_expand_move (machine_mode mode, rtx *operands)
{
/* Handle sets of MEM first. */
if (GET_CODE (operands[0]) == MEM)
@@ -1890,7 +1890,7 @@ sparc_expand_move (enum machine_mode mode, rtx *operands)
static void
sparc_emit_set_const32 (rtx op0, rtx op1)
{
- enum machine_mode mode = GET_MODE (op0);
+ machine_mode mode = GET_MODE (op0);
rtx temp = op0;
if (can_create_pseudo_p ())
@@ -2718,7 +2718,7 @@ sparc_emit_set_const64 (rtx op0, rtx op1)
is a PLUS, MINUS, NEG, or ASHIFT. CCmode should be used when no special
processing is needed. */
-enum machine_mode
+machine_mode
select_cc_mode (enum rtx_code op, rtx x, rtx y ATTRIBUTE_UNUSED)
{
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
@@ -2770,7 +2770,7 @@ select_cc_mode (enum rtx_code op, rtx x, rtx y ATTRIBUTE_UNUSED)
static rtx
gen_compare_reg_1 (enum rtx_code code, rtx x, rtx y)
{
- enum machine_mode mode;
+ machine_mode mode;
rtx cc_reg;
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
@@ -3735,7 +3735,7 @@ eligible_for_sibcall_delay (rtx_insn *trial)
not constant (TLS) or not known at final link time (PIC). */
static bool
-sparc_cannot_force_const_mem (enum machine_mode mode, rtx x)
+sparc_cannot_force_const_mem (machine_mode mode, rtx x)
{
switch (GET_CODE (x))
{
@@ -3829,7 +3829,7 @@ pic_address_needs_scratch (rtx x)
satisfies CONSTANT_P. */
static bool
-sparc_legitimate_constant_p (enum machine_mode mode, rtx x)
+sparc_legitimate_constant_p (machine_mode mode, rtx x)
{
switch (GET_CODE (x))
{
@@ -3925,7 +3925,7 @@ legitimate_pic_operand_p (rtx x)
ordinarily. This changes a bit when generating PIC. */
static bool
-sparc_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict)
+sparc_legitimate_address_p (machine_mode mode, rtx addr, bool strict)
{
rtx rs1 = NULL, rs2 = NULL, imm1 = NULL;
@@ -4383,7 +4383,7 @@ sparc_legitimize_pic_address (rtx orig, rtx reg)
static rtx
sparc_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
- enum machine_mode mode)
+ machine_mode mode)
{
rtx orig_x = x;
@@ -4468,7 +4468,7 @@ sparc_delegitimize_address (rtx x)
operand or requires a scratch register. */
rtx
-sparc_legitimize_reload_address (rtx x, enum machine_mode mode,
+sparc_legitimize_reload_address (rtx x, machine_mode mode,
int opnum, int type,
int ind_levels ATTRIBUTE_UNUSED, int *win)
{
@@ -4835,7 +4835,7 @@ sparc_init_modes (void)
for (i = 0; i < NUM_MACHINE_MODES; i++)
{
- enum machine_mode m = (enum machine_mode) i;
+ machine_mode m = (machine_mode) i;
unsigned int size = GET_MODE_SIZE (m);
switch (GET_MODE_CLASS (m))
@@ -5308,7 +5308,7 @@ emit_save_or_restore_regs (unsigned int low, unsigned int high, rtx base,
{
bool reg0 = save_p (i, leaf_function);
bool reg1 = save_p (i + 1, leaf_function);
- enum machine_mode mode;
+ machine_mode mode;
int regno;
if (reg0 && reg1)
@@ -6191,9 +6191,9 @@ init_cumulative_args (struct sparc_args *cum, tree fntype,
/* Handle promotion of pointer and integer arguments. */
-static enum machine_mode
+static machine_mode
sparc_promote_function_mode (const_tree type,
- enum machine_mode mode,
+ machine_mode mode,
int *punsignedp,
const_tree fntype ATTRIBUTE_UNUSED,
int for_return ATTRIBUTE_UNUSED)
@@ -6270,7 +6270,7 @@ scan_record_type (const_tree type, int *intregs_p, int *fpregs_p,
*PPADDING records the amount of padding needed in words. */
static int
-function_arg_slotno (const struct sparc_args *cum, enum machine_mode mode,
+function_arg_slotno (const struct sparc_args *cum, machine_mode mode,
const_tree type, bool named, bool incoming_p,
int *pregno, int *ppadding)
{
@@ -6424,8 +6424,8 @@ static void function_arg_record_value_2
(const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool);
static void function_arg_record_value_1
(const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool);
-static rtx function_arg_record_value (const_tree, enum machine_mode, int, int, int);
-static rtx function_arg_union_value (int, enum machine_mode, int, int);
+static rtx function_arg_record_value (const_tree, machine_mode, int, int, int);
+static rtx function_arg_union_value (int, machine_mode, int, int);
/* A subroutine of function_arg_record_value. Traverse the structure
recursively and determine how many registers will be required. */
@@ -6532,7 +6532,7 @@ static void
function_arg_record_value_3 (HOST_WIDE_INT bitpos,
struct function_arg_record_value_parms *parms)
{
- enum machine_mode mode;
+ machine_mode mode;
unsigned int regno;
unsigned int startbit, endbit;
int this_slotno, intslots, intoffset;
@@ -6633,7 +6633,7 @@ function_arg_record_value_2 (const_tree type, HOST_WIDE_INT startbitpos,
{
int this_slotno = parms->slotno + bitpos / BITS_PER_WORD;
int regno, nregs, pos;
- enum machine_mode mode = DECL_MODE (field);
+ machine_mode mode = DECL_MODE (field);
rtx reg;
function_arg_record_value_3 (bitpos, parms);
@@ -6694,7 +6694,7 @@ function_arg_record_value_2 (const_tree type, HOST_WIDE_INT startbitpos,
REGBASE is the regno of the base register for the parameter array. */
static rtx
-function_arg_record_value (const_tree type, enum machine_mode mode,
+function_arg_record_value (const_tree type, machine_mode mode,
int slotno, int named, int regbase)
{
HOST_WIDE_INT typesize = int_size_in_bytes (type);
@@ -6790,7 +6790,7 @@ function_arg_record_value (const_tree type, enum machine_mode mode,
REGNO is the hard register the union will be passed in. */
static rtx
-function_arg_union_value (int size, enum machine_mode mode, int slotno,
+function_arg_union_value (int size, machine_mode mode, int slotno,
int regno)
{
int nwords = ROUND_ADVANCE (size), i;
@@ -6861,7 +6861,7 @@ function_arg_vector_value (int size, int regno)
TARGET_FUNCTION_INCOMING_ARG. */
static rtx
-sparc_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
+sparc_function_arg_1 (cumulative_args_t cum_v, machine_mode mode,
const_tree type, bool named, bool incoming_p)
{
const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
@@ -6999,7 +6999,7 @@ sparc_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
/* Handle the TARGET_FUNCTION_ARG target hook. */
static rtx
-sparc_function_arg (cumulative_args_t cum, enum machine_mode mode,
+sparc_function_arg (cumulative_args_t cum, machine_mode mode,
const_tree type, bool named)
{
return sparc_function_arg_1 (cum, mode, type, named, false);
@@ -7008,7 +7008,7 @@ sparc_function_arg (cumulative_args_t cum, enum machine_mode mode,
/* Handle the TARGET_FUNCTION_INCOMING_ARG target hook. */
static rtx
-sparc_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode,
+sparc_function_incoming_arg (cumulative_args_t cum, machine_mode mode,
const_tree type, bool named)
{
return sparc_function_arg_1 (cum, mode, type, named, true);
@@ -7017,7 +7017,7 @@ sparc_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode,
/* For sparc64, objects requiring 16 byte alignment are passed that way. */
static unsigned int
-sparc_function_arg_boundary (enum machine_mode mode, const_tree type)
+sparc_function_arg_boundary (machine_mode mode, const_tree type)
{
return ((TARGET_ARCH64
&& (GET_MODE_ALIGNMENT (mode) == 128
@@ -7037,7 +7037,7 @@ sparc_function_arg_boundary (enum machine_mode mode, const_tree type)
mode] will be split between that reg and memory. */
static int
-sparc_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode,
+sparc_arg_partial_bytes (cumulative_args_t cum, machine_mode mode,
tree type, bool named)
{
int slotno, regno, padding;
@@ -7096,7 +7096,7 @@ sparc_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode,
static bool
sparc_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
- enum machine_mode mode, const_tree type,
+ machine_mode mode, const_tree type,
bool named ATTRIBUTE_UNUSED)
{
if (TARGET_ARCH32)
@@ -7148,7 +7148,7 @@ sparc_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
TYPE is null for libcalls where that information may not be available. */
static void
-sparc_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
+sparc_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
const_tree type, bool named)
{
CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
@@ -7193,7 +7193,7 @@ sparc_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
argument slot. */
enum direction
-function_arg_padding (enum machine_mode mode, const_tree type)
+function_arg_padding (machine_mode mode, const_tree type)
{
if (TARGET_ARCH64 && type != 0 && AGGREGATE_TYPE_P (type))
return upward;
@@ -7314,7 +7314,7 @@ sparc_struct_value_rtx (tree fndecl, int incoming)
except that up to 32 bytes may be returned in registers. */
static rtx
-sparc_function_value_1 (const_tree type, enum machine_mode mode,
+sparc_function_value_1 (const_tree type, machine_mode mode,
bool outgoing)
{
/* Beware that the two values are swapped here wrt function_arg. */
@@ -7425,7 +7425,7 @@ sparc_function_value (const_tree valtype,
/* Handle TARGET_LIBCALL_VALUE. */
static rtx
-sparc_libcall_value (enum machine_mode mode,
+sparc_libcall_value (machine_mode mode,
const_rtx fun ATTRIBUTE_UNUSED)
{
return sparc_function_value_1 (NULL_TREE, mode, false);
@@ -7569,15 +7569,15 @@ sparc_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
Specify whether the vector mode is supported by the hardware. */
static bool
-sparc_vector_mode_supported_p (enum machine_mode mode)
+sparc_vector_mode_supported_p (machine_mode mode)
{
return TARGET_VIS && VECTOR_MODE_P (mode) ? true : false;
}
/* Implement the TARGET_VECTORIZE_PREFERRED_SIMD_MODE target hook. */
-static enum machine_mode
-sparc_preferred_simd_mode (enum machine_mode mode)
+static machine_mode
+sparc_preferred_simd_mode (machine_mode mode)
{
if (TARGET_VIS)
switch (mode)
@@ -7680,7 +7680,7 @@ output_cbranch (rtx op, rtx dest, int label, int reversed, int annul,
static char string[64];
enum rtx_code code = GET_CODE (op);
rtx cc_reg = XEXP (op, 0);
- enum machine_mode mode = GET_MODE (cc_reg);
+ machine_mode mode = GET_MODE (cc_reg);
const char *labelno, *branch;
int spaces = 8, far;
char *p;
@@ -7924,7 +7924,7 @@ sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison)
{
const char *qpfunc;
rtx slot0, slot1, result, tem, tem2, libfunc;
- enum machine_mode mode;
+ machine_mode mode;
enum rtx_code new_comparison;
switch (comparison)
@@ -8063,7 +8063,7 @@ sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison)
optabs would emit if we didn't have TFmode patterns. */
void
-sparc_emit_floatunsdi (rtx *operands, enum machine_mode mode)
+sparc_emit_floatunsdi (rtx *operands, machine_mode mode)
{
rtx i0, i1, f0, in, out;
@@ -8096,7 +8096,7 @@ sparc_emit_floatunsdi (rtx *operands, enum machine_mode mode)
optabs would emit if we didn't have TFmode patterns. */
void
-sparc_emit_fixunsdi (rtx *operands, enum machine_mode mode)
+sparc_emit_fixunsdi (rtx *operands, machine_mode mode)
{
rtx i0, i1, f0, in, out, limit;
@@ -8140,7 +8140,7 @@ sparc_emit_fixunsdi (rtx *operands, enum machine_mode mode)
const char *
output_cbcond (rtx op, rtx dest, rtx_insn *insn)
{
- enum machine_mode mode = GET_MODE (XEXP (op, 0));
+ machine_mode mode = GET_MODE (XEXP (op, 0));
enum rtx_code code = GET_CODE (op);
const char *cond_str, *tmpl;
int far, emit_nop, len;
@@ -8269,7 +8269,7 @@ output_v9branch (rtx op, rtx dest, int reg, int label, int reversed,
{
static char string[64];
enum rtx_code code = GET_CODE (op);
- enum machine_mode mode = GET_MODE (XEXP (op, 0));
+ machine_mode mode = GET_MODE (XEXP (op, 0));
rtx note;
int far;
char *p;
@@ -8683,7 +8683,7 @@ mems_ok_for_ldd_peep (rtx mem1, rtx mem2, rtx dependent_reg_rtx)
/* Return the widened memory access made of MEM1 and MEM2 in MODE. */
rtx
-widen_mem_for_ldd_peep (rtx mem1, rtx mem2, enum machine_mode mode)
+widen_mem_for_ldd_peep (rtx mem1, rtx mem2, machine_mode mode)
{
rtx x = widen_memory_access (mem1, mode, 0);
MEM_NOTRAP_P (x) = MEM_NOTRAP_P (mem1) && MEM_NOTRAP_P (mem2);
@@ -10678,7 +10678,7 @@ sparc_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED)
static rtx
sparc_expand_builtin (tree exp, rtx target,
rtx subtarget ATTRIBUTE_UNUSED,
- enum machine_mode tmode ATTRIBUTE_UNUSED,
+ machine_mode tmode ATTRIBUTE_UNUSED,
int ignore ATTRIBUTE_UNUSED)
{
tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
@@ -10692,7 +10692,7 @@ sparc_expand_builtin (tree exp, rtx target,
if (nonvoid)
{
- enum machine_mode tmode = insn_data[icode].operand[0].mode;
+ machine_mode tmode = insn_data[icode].operand[0].mode;
if (!target
|| GET_MODE (target) != tmode
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
@@ -10974,7 +10974,7 @@ static bool
sparc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
int *total, bool speed ATTRIBUTE_UNUSED)
{
- enum machine_mode mode = GET_MODE (x);
+ machine_mode mode = GET_MODE (x);
bool float_mode_p = FLOAT_MODE_P (mode);
switch (code)
@@ -11200,7 +11200,7 @@ general_or_i64_p (reg_class_t rclass)
/* Implement TARGET_REGISTER_MOVE_COST. */
static int
-sparc_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
+sparc_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
reg_class_t from, reg_class_t to)
{
bool need_memory = false;
@@ -11805,7 +11805,7 @@ void
sparc_expand_compare_and_swap (rtx operands[])
{
rtx bval, retval, mem, oldval, newval;
- enum machine_mode mode;
+ machine_mode mode;
enum memmodel model;
bval = operands[0];
@@ -11843,7 +11843,7 @@ sparc_expand_compare_and_swap (rtx operands[])
}
void
-sparc_expand_vec_perm_bmask (enum machine_mode vmode, rtx sel)
+sparc_expand_vec_perm_bmask (machine_mode vmode, rtx sel)
{
rtx t_1, t_2, t_3;
@@ -12064,7 +12064,7 @@ sparc_conditional_register_usage (void)
static reg_class_t
sparc_preferred_reload_class (rtx x, reg_class_t rclass)
{
- enum machine_mode mode = GET_MODE (x);
+ machine_mode mode = GET_MODE (x);
if (CONSTANT_P (x))
{
if (FP_REG_CLASS_P (rclass)
@@ -12182,8 +12182,8 @@ output_v8plus_mult (rtx_insn *insn, rtx *operands, const char *opcode)
and INNER_MODE are the modes describing TARGET. */
static void
-vector_init_bshuffle (rtx target, rtx elt, enum machine_mode mode,
- enum machine_mode inner_mode)
+vector_init_bshuffle (rtx target, rtx elt, machine_mode mode,
+ machine_mode inner_mode)
{
rtx t1, final_insn, sel;
int bmask;
@@ -12264,8 +12264,8 @@ vector_init_faligndata (rtx target, rtx elt)
void
sparc_expand_vector_init (rtx target, rtx vals)
{
- const enum machine_mode mode = GET_MODE (target);
- const enum machine_mode inner_mode = GET_MODE_INNER (mode);
+ const machine_mode mode = GET_MODE (target);
+ const machine_mode inner_mode = GET_MODE_INNER (mode);
const int n_elts = GET_MODE_NUNITS (mode);
int i, n_var = 0;
bool all_same;
@@ -12344,7 +12344,7 @@ sparc_expand_vector_init (rtx target, rtx vals)
static reg_class_t
sparc_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
- enum machine_mode mode, secondary_reload_info *sri)
+ machine_mode mode, secondary_reload_info *sri)
{
enum reg_class rclass = (enum reg_class) rclass_i;
@@ -12409,10 +12409,10 @@ sparc_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
OPERANDS[0] in MODE. OPERANDS[1] is the operator of the condition. */
bool
-sparc_expand_conditional_move (enum machine_mode mode, rtx *operands)
+sparc_expand_conditional_move (machine_mode mode, rtx *operands)
{
enum rtx_code rc = GET_CODE (operands[1]);
- enum machine_mode cmp_mode;
+ machine_mode cmp_mode;
rtx cc_reg, dst, cmp;
cmp = operands[1];
@@ -12470,7 +12470,7 @@ sparc_expand_conditional_move (enum machine_mode mode, rtx *operands)
code to be used for the condition mask. */
void
-sparc_expand_vcond (enum machine_mode mode, rtx *operands, int ccode, int fcode)
+sparc_expand_vcond (machine_mode mode, rtx *operands, int ccode, int fcode)
{
rtx mask, cop0, cop1, fcmp, cmask, bshuf, gsr;
enum rtx_code code = GET_CODE (operands[3]);
@@ -12510,7 +12510,7 @@ sparc_expand_vcond (enum machine_mode mode, rtx *operands, int ccode, int fcode)
registers should return 4 here. */
unsigned int
-sparc_regmode_natural_size (enum machine_mode mode)
+sparc_regmode_natural_size (machine_mode mode)
{
int size = UNITS_PER_WORD;
@@ -12534,7 +12534,7 @@ sparc_regmode_natural_size (enum machine_mode mode)
point registers are 32-bit addressable. */
bool
-sparc_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
+sparc_modes_tieable_p (machine_mode mode1, machine_mode mode2)
{
enum mode_class mclass1, mclass2;
unsigned short size1, size2;
@@ -12573,7 +12573,7 @@ sparc_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
/* Implement TARGET_CSTORE_MODE. */
-static enum machine_mode
+static machine_mode
sparc_cstore_mode (enum insn_code icode ATTRIBUTE_UNUSED)
{
return (TARGET_ARCH64 ? DImode : SImode);