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authortbsaunde <tbsaunde@138bc75d-0d04-0410-961f-82ee72b054a4>2014-04-17 12:37:34 +0000
committertbsaunde <tbsaunde@138bc75d-0d04-0410-961f-82ee72b054a4>2014-04-17 12:37:34 +0000
commit65b0537f9e9741318f7c8e738b6dd3b8f82f58b5 (patch)
tree2c7de59d1f6572c580defbe0ccac2d0b83cd1eb3 /gcc/config/s390
parent31315c249fd6c60b4a598dcd261d50a11d78b5d0 (diff)
downloadgcc-65b0537f9e9741318f7c8e738b6dd3b8f82f58b5.tar.gz
pass cfun to pass::execute
gcc/ * passes.c (opt_pass::execute): Adjust. (pass_manager::execute_pass_mode_switching): Likewise. (early_local_passes::execute): Likewise. (execute_one_pass): Pass cfun to the pass's execute method. * tree-pass.h (opt_pass::execute): Add function * argument. * asan.c, auto-inc-dec.c, bb-reorder.c, bt-load.c, cfgcleanup.c, cfgexpand.c, cfgrtl.c, cgraphbuild.c, combine-stack-adj.c, combine.c, compare-elim.c, config/arc/arc.c, config/epiphany/mode-switch-use.c, config/epiphany/resolve-sw-modes.c, config/i386/i386.c, config/mips/mips.c, config/rl78/rl78.c, config/s390/s390.c, config/sparc/sparc.c, cprop.c, dce.c, df-core.c, dse.c, dwarf2cfi.c, except.c, final.c, function.c, fwprop.c, gcse.c, gimple-low.c, gimple-ssa-isolate-paths.c, gimple-ssa-strength-reduction.c, graphite.c, ifcvt.c, init-regs.c, ipa-cp.c, ipa-devirt.c, ipa-inline-analysis.c, ipa-inline.c, ipa-profile.c, ipa-pure-const.c, ipa-reference.c, ipa-split.c, ipa.c, ira.c, jump.c, loop-init.c, lower-subreg.c, mode-switching.c, omp-low.c, postreload-gcse.c, postreload.c, predict.c, recog.c, ree.c, reg-stack.c, regcprop.c, reginfo.c, regrename.c, reorg.c, sched-rgn.c, stack-ptr-mod.c, store-motion.c, tracer.c, trans-mem.c, tree-call-cdce.c, tree-cfg.c, tree-cfgcleanup.c, tree-complex.c, tree-eh.c, tree-emutls.c, tree-if-conv.c, tree-into-ssa.c, tree-loop-distribution.c, tree-nrv.c, tree-object-size.c, tree-parloops.c, tree-predcom.c, tree-ssa-ccp.c, tree-ssa-copy.c, tree-ssa-copyrename.c, tree-ssa-dce.c, tree-ssa-dom.c, tree-ssa-dse.c, tree-ssa-forwprop.c, tree-ssa-ifcombine.c, tree-ssa-loop-ch.c, tree-ssa-loop-im.c, tree-ssa-loop-ivcanon.c, tree-ssa-loop-prefetch.c, tree-ssa-loop-unswitch.c, tree-ssa-loop.c, tree-ssa-math-opts.c, tree-ssa-phiopt.c, tree-ssa-phiprop.c, tree-ssa-pre.c, tree-ssa-reassoc.c, tree-ssa-sink.c, tree-ssa-strlen.c, tree-ssa-structalias.c, tree-ssa-uncprop.c, tree-ssa-uninit.c, tree-ssa.c, tree-ssanames.c, tree-stdarg.c, tree-switch-conversion.c, tree-tailcall.c, tree-vect-generic.c, tree-vectorizer.c, tree-vrp.c, tree.c, tsan.c, ubsan.c, var-tracking.c, vtable-verify.c, web.c: Adjust. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209482 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/s390')
-rw-r--r--gcc/config/s390/s390.c56
1 files changed, 28 insertions, 28 deletions
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 77e163fac79..cc8f32e169c 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -8631,33 +8631,6 @@ s390_restore_gprs_from_fprs (void)
/* A pass run immediately before shrink-wrapping and prologue and epilogue
generation. */
-static unsigned int
-s390_early_mach (void)
-{
- rtx insn;
-
- /* Try to get rid of the FPR clobbers. */
- s390_optimize_nonescaping_tx ();
-
- /* Re-compute register info. */
- s390_register_info ();
-
- /* If we're using a base register, ensure that it is always valid for
- the first non-prologue instruction. */
- if (cfun->machine->base_reg)
- emit_insn_at_entry (gen_main_pool (cfun->machine->base_reg));
-
- /* Annotate all constant pool references to let the scheduler know
- they implicitly use the base register. */
- for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
- if (INSN_P (insn))
- {
- annotate_constant_pool_refs (&PATTERN (insn));
- df_insn_rescan (insn);
- }
- return 0;
-}
-
namespace {
const pass_data pass_data_s390_early_mach =
@@ -8683,10 +8656,37 @@ public:
{}
/* opt_pass methods: */
- unsigned int execute () { return s390_early_mach (); }
+ virtual unsigned int execute (function *);
}; // class pass_s390_early_mach
+unsigned int
+pass_s390_early_mach::execute (function *fun)
+{
+ rtx insn;
+
+ /* Try to get rid of the FPR clobbers. */
+ s390_optimize_nonescaping_tx ();
+
+ /* Re-compute register info. */
+ s390_register_info ();
+
+ /* If we're using a base register, ensure that it is always valid for
+ the first non-prologue instruction. */
+ if (fun->machine->base_reg)
+ emit_insn_at_entry (gen_main_pool (fun->machine->base_reg));
+
+ /* Annotate all constant pool references to let the scheduler know
+ they implicitly use the base register. */
+ for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
+ if (INSN_P (insn))
+ {
+ annotate_constant_pool_refs (&PATTERN (insn));
+ df_insn_rescan (insn);
+ }
+ return 0;
+}
+
} // anon namespace
/* Expand the prologue into a bunch of separate insns. */