diff options
author | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-01-22 21:50:56 +0000 |
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committer | uweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-01-22 21:50:56 +0000 |
commit | a491f896912c032b36df97df63179ad1a6a76d6e (patch) | |
tree | 2c2adb1804762fb6d8b154312f9b4ec27962e49a /gcc/config/s390 | |
parent | 440877fc141f042b24c6f1b4bc4e9c512d7f322b (diff) | |
download | gcc-a491f896912c032b36df97df63179ad1a6a76d6e.tar.gz |
* config/s390/s390.md ("doloop_si64"): Reload input value directly
into the register being decremented.
("doloop_si31", "doloop_di"): Likewise.
("*doloop_si_long"): Adapt pattern.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@94078 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/s390')
-rw-r--r-- | gcc/config/s390/s390.md | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index bc827bd97b4..4b8b58ad45c 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -7266,7 +7266,7 @@ (pc))) (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:SI 3 "=X,&d")) + (clobber (match_scratch:SI 3 "=X,&1")) (clobber (reg:CC 33))] "TARGET_CPU_ZARCH" { @@ -7280,8 +7280,7 @@ "&& reload_completed && (! REG_P (operands[2]) || ! rtx_equal_p (operands[1], operands[2]))" - [(set (match_dup 3) (match_dup 1)) - (parallel [(set (reg:CCAN 33) + [(parallel [(set (reg:CCAN 33) (compare:CCAN (plus:SI (match_dup 3) (const_int -1)) (const_int 0))) (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))]) @@ -7305,7 +7304,7 @@ (pc))) (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:SI 3 "=X,&d")) + (clobber (match_scratch:SI 3 "=X,&1")) (clobber (reg:CC 33))] "!TARGET_CPU_ZARCH" { @@ -7319,8 +7318,7 @@ "&& reload_completed && (! REG_P (operands[2]) || ! rtx_equal_p (operands[1], operands[2]))" - [(set (match_dup 3) (match_dup 1)) - (parallel [(set (reg:CCAN 33) + [(parallel [(set (reg:CCAN 33) (compare:CCAN (plus:SI (match_dup 3) (const_int -1)) (const_int 0))) (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))]) @@ -7347,7 +7345,7 @@ (pc))) (set (match_operand:SI 2 "register_operand" "=1,?*m*d") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:SI 3 "=X,&d")) + (clobber (match_scratch:SI 3 "=X,&1")) (clobber (reg:CC 33))] "!TARGET_CPU_ZARCH" { @@ -7369,9 +7367,9 @@ (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:DI 2 "nonimmediate_operand" "=1,?*m*r") + (set (match_operand:DI 2 "nonimmediate_operand" "=1,?*m*d") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:DI 3 "=X,&d")) + (clobber (match_scratch:DI 3 "=X,&1")) (clobber (reg:CC 33))] "TARGET_64BIT" { @@ -7385,8 +7383,7 @@ "&& reload_completed && (! REG_P (operands[2]) || ! rtx_equal_p (operands[1], operands[2]))" - [(set (match_dup 3) (match_dup 1)) - (parallel [(set (reg:CCAN 33) + [(parallel [(set (reg:CCAN 33) (compare:CCAN (plus:DI (match_dup 3) (const_int -1)) (const_int 0))) (set (match_dup 3) (plus:DI (match_dup 3) (const_int -1)))]) |